參數(shù)資料
型號： PCM3002EG
元件分類： Codec
英文描述： 16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS
中文描述： 16/20-BIT單端模擬輸入/輸出立體聲編解碼器
文件頁數(shù)： 27/39頁
文件大?。?/td> 515K
代理商： PCM3002EG
www.ti.com
MAPPING OF PROGRAM REGISTERS
SOFTWARE CONTROL (PCM3002)
The PCM3002 special functions are controlled using four program registers which are each 16 bits long. There
are four distinct registers, with bits 9 and 10 determining which register is in use. Table 3 describes the functions
of the four registers.
PROGRAM REGISTER 0
res:
Bits 15–11: Reserved
These bits are reserved and should be set to 0.
PCM3002
PCM3003
SBAS079A–OCTOBER 2000–REVISED OCTOBER 2004
B15
res
B14
res
B13
res
B12
res
B11
res
B10
A1
B9
A0
B8
LDL
B7
AL7
B6
AL6
B5
AL5
B4
AL4
B3
AL3
B2
AL2
B1
AL1
B0
AL0
REGISTER 0
REGISTER 1
res
res
res
res
res
A1
A0
LDR
AR7
AR6
AR5
AR4
AR3
AR2
AR1
AR0
REGISTER 2
res
res
res
res
res
A1
A0
PDAD
BYPS
PDDA
ATC
IZD
OUT
DEM1 DEM0
MUT
REGISTER 3
res
res
res
res
res
A1
A0
res
res
res
LOP
res
FMT1
FMT0
LRP
res
NOTE: res indicates a reserved bit that should be set to 0.
Table 3. Functions of the Registers
REGISTER NAME
Register 0
REGISTER BIT(S)
15–11
10–9
8
BIT NAME
res
A[1:0]
LDL
DESCRIPTION
Reserved, should be set to 0
Register address 00
DAC attenuation data load control for
Lch
DAC attenuation data for Lch
Reserved, should be set to 0
Register address 01
DAC attenuation data load control for
Rch
DAC attenuation data for Rch
Reserved, should be set to 0
Register address 10
ADC power-down control
ADC high-pass filter bypass control
DAC power-down control
DAC attenuation data mode control
DAC infinite zero detection and mute
control
DAC output enable control
DAC de-emphasis control
DAC Lch and Rch soft mute control
Reserved, should be set to 0
Register address 11
Reserved, should be set to 0
ADC/DAC digital loopback control
Reserved, should be set to 0
ADC/DAC audio data format selection
ADC/DAC polarity of LR-clock selection
Reserved, should be set to 0
7–0
15–11
10–9
8
AL[7:0]
res
A[1:0]
LDR
Register 1
7–0
15–11
10–9
8
7
6
5
4
AR[7:0]
res
A[1:0]
PDAD
BYPS
PDDA
ATC
IZD
Register 2
3
OUT
DEM[1:0]
MUT
res
A[1:0]
res
LOP
res
FMT[1:0]
LRP
res
2–1
0
15–11
10–9
8–6
5
4
3–2
1
0
Register 3
27
相關(guān)PDF資料
PDF描述
PCM3002EG4 16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS
PCM3002EGE6 16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS
PCM3003EG4 16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS
PCM3060 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
PCM3060PW 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCM3002EG/2K 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3002EG/2KE6 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3002EG4 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3002EGE6 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3003 制造商:BB 制造商全稱:BB 功能描述:16-/20-Bit Single-Ended Analog Input/Output STEREO AUDIO CODECs
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