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參數(shù)資料
型號(hào)： PCM3168APAPRG4
廠商： Texas Instruments
文件頁(yè)數(shù)： 26/68頁(yè)
文件大?。?/td> 0K
描述： IC 24-BIT AUDIO CODEC 64-HTQFP
標(biāo)準(zhǔn)包裝： 1,000
類型： 音頻編解碼器
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 6 / 8
三角積分調(diào)變： 是
S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： 107 / 112（差分），104 / 112（單端）
動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 107 / 112（差分），104 / 112（單端）
電壓 - 電源，模擬： 4.5 V ~ 5.5 V
電壓 - 電源，數(shù)字： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-HTQFP（10x10）
包裝： 帶卷 (TR)
REGISTER WRITE OPERATION
MS
MC
MDI
X
(1)
'0'
ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0
D7
D6
D5
D4
D3
D2
D1
D0
X
R/
W ADR6
REGISTER READ OPERATION
MS
MC
MDI
X
(1)
'1'
ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0
Don'tCare(X)
R/
W ADR6
MDO
Hi-Z
D7
D6
D5
D4
D3
D2
D1
D0
SBAS452 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com
Figure 48 shows the functional timing diagram for single write operations on the serial control port. MS is held at
a high state until a register must be written. To start the register write cycle, MS is set to a low state. 16 clocks
are then provided on MC, corresponding to the 16 bits of the control data word on MDI. After the 16th clock cycle
has been completed, MS is set high to latch the data into the indexed mode control register.
Also, the PCM3168A and PCM3168A-Q1 support multiple write operations in addition to single write operations,
which can be performed by sending the following N-times of the 8-bit register data after the first 16-bit register
address and register data while keeping the MC clocks and MS at a low state. Closing a multiple write operation
can be accomplished by setting MS to a high state.
(1) X = Don't care.
Figure 48. Register Write Operation
Figure 49 shows the functional timing diagram for single read operations on the serial control port. MS is held at
a high state until a register must be read. To start the register read cycle, MS is set to a low state. 16 clocks are
then provided on MC, corresponding to the first eight bits of the control data word on MDI and the second eight
bits of the read-back data word from MDO. After the 16th clock cycle has been completed, MS is held high for
the next write or read operation. MDO remains in a high impedance state except during the eight MC clock
periods of the actual data transfer.
(1) X = Don't care.
Figure 49. Register Read Operation
32
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s): PCM3168A PCM3168A-Q1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCM3168A-Q1 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-Bit, 96-kHz/192-kHz, 6-In/8-Out Audio Codec with Differential Input/Output
PCM3168ATPAPQ1 功能描述:接口—CODEC 24B,6-In/8-Out Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3168ATPAPRQ1 功能描述:接口—CODEC 24B,6-In/8-Out Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3168ATPAPRQ1G4 功能描述:接口—CODEC 24B,6-In/8-Out Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3168TPAPRQ1 制造商:Texas Instruments 功能描述:
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