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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | PCM3168APAPRG4 |
| 寤犲晢锛� | Texas Instruments |
| 鏂囦欢闋佹暩(sh霉)锛� | 33/68闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC 24-BIT AUDIO CODEC 64-HTQFP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1,000 |
| 椤炲瀷锛� | 闊抽牷绶ㄨВ纰煎櫒 |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶 |
| 鍒嗚鲸鐜囷紙浣嶏級锛� | 24 b |
| ADC / DAC 鏁�(sh霉)閲忥細 | 6 / 8 |
| 涓夎绌嶅垎瑾�(di脿o)璁婏細 | 鏄� |
| S/N 姣�锛屾(bi膩o)婧�(zh菙n) ADC / DAC (db)锛� | 107 / 112锛堝樊鍒嗭級锛�104 / 112锛堝柈绔級 |
| 鍕�(d貌ng)鎱�(t脿i)鑼冨湇锛屾(bi膩o)婧�(zh菙n) ADC / DAC (db)锛� | 107 / 112锛堝樊鍒嗭級锛�104 / 112锛堝柈绔級 |
| 闆诲 - 闆绘簮锛屾ā鎿細 | 4.5 V ~ 5.5 V |
| 闆诲 - 闆绘簮锛屾暩(sh霉)瀛楋細 | 3 V ~ 3.6 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 64-TQFP 瑁搁湶鐒婄洡 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 64-HTQFP锛�10x10锛� |
| 鍖呰锛� | 甯跺嵎 (TR) |
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www.ti.com ......................................................................................................................................................................................... SBAS452 鈥� SEPTEMBER 2008
DEC
HEX
B7
B6
B5
B4
B3
B2
B1
B0
65
41
PSMDA
MSDA2
MSDA1
MSDA0
FMTDA3
FMTDA2
FMTDA1
FMTDA0
PSMDA
DAC Power-save mode select
This bit selects the power-save mode for the OPEDA[3:0] function. OPEDA[3:0] is the control of
power-save mode and normal operation for PSMDA = 0, or OPEDA[3:0] works as the control of
DAC disable (not power-save mode) and normal operation for PSMDA = 1.
Default value: 0.
PSMDA
DAC Power-save mode select
0
Power-save enable mode (default)
1
Power-save disable mode
MSDA[2:0]
DAC Master/slave mode select
These bits control the audio interface mode for DAC operation.
Default value: 000 (slave mode).
MSDA
DAC Master/slave mode select
000
Slave mode (default)
001
Master mode, 768 fS
010
Master mode, 512 fS
011
Master mode, 384 fS
100
Master mode, 256 fS
101
Master mode, 192 fS
110
Master mode, 128 fS
111
Reserved
FMTDA[3:0] DAC Audio interface format select
These bits control the audio interface format for DAC operation. Details of the format, and any
related restrictions with the system clock and master/slave mode, are described in the Audio
Data Interface Formats and Timing section.
Default value: 0000 (24-bit I2S format).
FMTDA
DAC Audio interface format select
0000
24-bit I2S format (default)
0001
24-bit left-justified format
0010
24-bit right-justified format
0011
16-bit right-justified format
0100
24-bit I2S mode DSP format
0101
24-bit left-justified mode DSP format
0110
24-bit I2S mode TDM format
0111
24-bit left-justified mode TDM format
1000
24-bit high-speed I2S mode TDM format
1001
24-bit high-speed left-justified mode TDM format
101x
Reserved
11xx
Reserved
Copyright 2008, Texas Instruments Incorporated
39
Product Folder Link(s): PCM3168A PCM3168A-Q1
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VE-B23-IW-B1 | CONVERTER MOD DC/DC 24V 100W |
| VI-BN1-IY-F3 | CONVERTER MOD DC/DC 12V 50W |
| VI-BWX-IX-B1 | CONVERTER MOD DC/DC 5.2V 75W |
| VE-2NT-CU-S | CONVERTER MOD DC/DC 6.5V 200W |
| VI-B7Z-IW-F2 | CONVERTER MOD DC/DC 2V 40W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PCM3168A-Q1 | 鍒堕€犲晢:TI 鍒堕€犲晢鍏ㄧū:Texas Instruments 鍔熻兘鎻忚堪:24-Bit, 96-kHz/192-kHz, 6-In/8-Out Audio Codec with Differential Input/Output |
| PCM3168ATPAPQ1 | 鍔熻兘鎻忚堪:鎺ュ彛鈥擟ODEC 24B,6-In/8-Out Audio CODEC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 椤炲瀷: 鍒嗚鲸鐜�: 杞�(zhu菐n)鎻涢€熺巼:48 kSPs 鎺ュ彛椤炲瀷:I2C ADC 鏁�(sh霉)閲�:2 DAC 鏁�(sh霉)閲�:4 宸ヤ綔闆绘簮闆诲:1.8 V, 2.1 V, 2.3 V to 5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-81 灏佽:Reel |
| PCM3168ATPAPRQ1 | 鍔熻兘鎻忚堪:鎺ュ彛鈥擟ODEC 24B,6-In/8-Out Audio CODEC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 椤炲瀷: 鍒嗚鲸鐜�: 杞�(zhu菐n)鎻涢€熺巼:48 kSPs 鎺ュ彛椤炲瀷:I2C ADC 鏁�(sh霉)閲�:2 DAC 鏁�(sh霉)閲�:4 宸ヤ綔闆绘簮闆诲:1.8 V, 2.1 V, 2.3 V to 5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-81 灏佽:Reel |
| PCM3168ATPAPRQ1G4 | 鍔熻兘鎻忚堪:鎺ュ彛鈥擟ODEC 24B,6-In/8-Out Audio CODEC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 椤炲瀷: 鍒嗚鲸鐜�: 杞�(zhu菐n)鎻涢€熺巼:48 kSPs 鎺ュ彛椤炲瀷:I2C ADC 鏁�(sh霉)閲�:2 DAC 鏁�(sh霉)閲�:4 宸ヤ綔闆绘簮闆诲:1.8 V, 2.1 V, 2.3 V to 5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-81 灏佽:Reel |
| PCM3168TPAPRQ1 | 鍒堕€犲晢:Texas Instruments 鍔熻兘鎻忚堪: |
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