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參數資料
| 型號： | PCM3500DATASHEET |
| 英文描述： | PCM3500 Data Sheet - Low Voltage. Low Power. 16-Bit. Mono SoundPlus VOICE |
| 中文描述： | PCM3500數據表-低電壓。低功耗。 16位。單SoundPlus語音 |
| 文件頁數： | 14/26頁 |
| 文件大?。?/td> | 199K |
| 代理商： | PCM3500DATASHEET |
14
PCM3500
SERIAL INTERFACE
The serial interface of the PCM3500 is a 4-wire synchronous
serial port. It includes FS (pin 9), BCK (pin 8), DIN (pin 10)
and DOUT (pin 11). FS is the frame synchronization clock,
BCK is the serial bit or shift clock, DIN is the serial data input
for the DAC, and DOUT is the serial data output for the ADC.
The frame sync, FS, operates at the sampling frequency (f
S
).
The bit clock, BCK, operates at 16f
S
for normal operation.
DIN and DOUT also operate at the bit clock rate. Both FS
and BCK must be synchronous with the system clock (guar-
anteed in Master Mode). Data for DIN is clocked into the
serial interface on the rising edge of BCK, while data for
DOUT is clocked out of the serial interface on the falling
edge of BCK.
Figure 6 shows the serial interface format for the PCM3500.
The serial data for DIN and DOUT must be in Binary Two’s
Complement, MSB-first format. Figures 7 and 8 show the
timing specifications for the serial interface when used in
Slave and Master Modes.
FS
BCK
DIN
DOUT
MSB
MSB
LSB
LSB
MSB
MSB
LSB
LSB
15 14 13 12 11
2
1
0
5
4
3
15 14 13 12 11
2
1
0
5
4
3
15 14 13 12 11
2
1
0
5
4
3
15 14 13 12 11
2
1
0
5
4
3
1/f
S
16-Bit/Frame
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
BCKP
t
BCKH
t
BCKL
t
FSW
t
FSP
t
FSSU
t
FSHD
t
DISU
t
DIHD
t
CKDO
t
R
t
F
BCK Period
BCK Pulse Width HIGH
BCK Pulse Width LOW
FS Pulse Width HIGH
FS Period
FS Set Up Time to BCK Rising Edge
FS Hold Time to BCK Rising Edge
DIN Set Up Time to BCK Rising Edge
DIN Hold Time to BCK Rising Edge
Delay Time BCK Falling Edge to DOUT
Rising Time of All Signals
Falling Time of All Signals
2400
800
800
ns
ns
ns
ns
t
BCKP
– 60
t
BCKP
1/f
S
t
BCKP
+ 60
60
60
60
60
0
ns
ns
ns
ns
ns
ns
ns
80
30
30
FIGURE 6. Serial Interface Format.
FIGURE 7. Serial Interface Timing for Slave Mode.
t
FSW
t
FSSU
t
FSHD
t
BCKP
t
BCKH
t
DISU
t
DIHD
t
BCKL
t
CKDO
t
FSP
FS
(input)
BCK
(input)
DIN
(input)
DOUT
(output)
NOTES: Timing measurement reference level is (VIH/VIL)/2. RIsing and falling time is measured
from 10% to 90% of IN/OUT signal swing. Load capacitance of DOUT signal is 50pF.
0.5V
DD
0.5V
DD
0.5V
DD
0.5V
DD
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PCM3500E | 功能描述:接口—CODEC Lo-Vlt Lo-Pwr Mono Voice/Modem Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3500E/2K | 功能描述:接口—CODEC Lo-Vlt Lo-Pwr Mono Voice/Modem Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3500E/2KG4 | 功能描述:接口—CODEC Lo-Vlt Lo-Pwr Mono Voice/Modem Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3500EG4 | 功能描述:接口—CODEC Lo-Vlt Lo-Pwr Mono Voice/Modem Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3501 | 制造商:BB 制造商全稱:BB 功能描述:Low Voltage, Low Power, 16-Bit, Mono VOICE/MODEM CODEC |
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