參數(shù)資料
型號(hào)： PCM4222PFBR
英文描述： High-Performance, Two-Channel, 24-Bit, 216kHz Sampling Multi-Bit Delta-Sigma Analog-to-Digital Converter
中文描述： 高性能，雙通道，24位，216kHz的采樣多位Δ-Σ模擬到數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù)： 20/38頁(yè)
文件大小： 604K
代理商： PCM4222PFBR
www.ti.com
DISABLED STATES FOR THE PCM4222 AUDIO INTERFACES
When a particular mode is disabled, the output data and clocks associated with that mode are driven low. The
exception is when MODEN is driven low, disabling the multi-bit modulator output. For this case, the data and
clock outputs associated with the modulator output are re-mapped to functions utilized for either PCM or DSD
mode operation.
PCM OUTPUT AND SAMPLING MODES
The PCM4222 supports 24-bit linear PCM output data when the PCMEN input (pin 16) is forced high. The PCM
output is disabled when PCMEN is forced low. The 24-bit output data may be dithered to 20-, 18-, or 16-bits
using internal word length reduction circuitry. Refer to the
Output Word Length Reduction
section of this data
sheet for additional information.
AUDIO SERIAL PORT INTERFACE
The PCM output mode supports a three-wire synchronous serial interface. This interface includes a serial data
output (DATA, pin 32), a serial bit or data clock (BCK, pin 33), and a left/right word clock (LRCK, pin 34). The
BCK and LRCK clock pins may be inputs or outputs, dependent upon the Slave or Master mode configuration.
Figure 41
illustrates Slave and Master mode serial port connections to an external audio signal processor or
host device.
PCM4222
SBAS399A–OCTOBER 2006–REVISED MARCH 2007
The PCM4222 supports three PCM sampling modes, referred to as Normal, Double Speed, and Quad Speed.
The sampling mode is determined by the state of the FS0 and FS1 inputs (pins 19 and 20, respectively).
Table 2
summarizes the sampling modes available for the PCM4222.
Normal sampling mode supports output sampling rates from 8kHz to 54kHz. The
Σ
modulator operates with
128x oversampling in this mode. Both the Classic and Low Group Delay decimation filter responses are
available in Normal mode. The master clock (MCKI) rate must be 256x the desired output sampling rate for
Normal operation.
The Double Speed sampling mode supports output sampling rates from 54kHz to 108kHz. The delta-sigma
modulator operates with 64x oversampling in this mode. Both the Classic and Low Group Delay decimation filter
responses are available in Double Speed mode. The master clock (MCKI) rate must be 128x the desired output
sampling rate for Double Speed operation.
Quad Speed sampling mode supports output sampling rates from 108kHz to 216kHz. The delta-sigma modulator
operates with 32x oversampling in this mode. Only the Low Group Delay decimation filter response is available
in Quad Speed mode. The master clock (MCKI) rate must be 64x the desired output sampling rate for Quad
Speed operation.
Table 2. PCM Sampling Mode Configuration
FS1 (pin 20)
LO
LO
HI
HI
FS0 (pin 19)
LO
HI
LO
HI
SAMPLING MODE
Normal, 8kHz
≤
f
S
≤
54kHz
Double Speed, 54kHz < f
S
≤
108kHz
Quad Speed, 108kHz < f
S
≤
216kHz
Reserved
The audio serial port supports four data formats that are illustrated in
Figure 42
,
Figure 44
, and
Figure 45
. The
I
2
S and Left-Justified formats support two channels of audio output data. The TDM data formats can support up
to eight channels of audio output data on a single data line. The audio data format is selected using the FMT0
and FMT1 inputs (pins 44 and 43, respectively).
Table 3
summarizes the audio data format options. For all
formats, audio data are represented as two’s complement binary data, with the MSB transmitted first.
Regardless of the format selection, audio data are always clocked out of the port on the falling edge of the BCK
clock.
20
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參數(shù)描述
PCM4222PFBRG4 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC 24B/216kHz 124dB Stereo Audio ADC RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: 封裝:
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PCM-426 制造商:Panduit Corp 功能描述:Call vendor for pricing
PCM-429 制造商:Panduit Corp 功能描述:
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