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參數(shù)資料
| 型號： | PDI1394L21 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Full Duplex AV Link Layer Ccontroller(全雙工AV鏈接層控制器) |
| 中文描述： | 全雙工鏈路層Ccontroller影音（全雙工視聽鏈接層控制器） |
| 文件頁數(shù)： | 52/54頁 |
| 文件大?。?/td> | 242K |
| 代理商： | PDI1394L21 |
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ERRATA LIST FOR THE PHILIPS
PDI1394L21 1394 FULL DUPLEX AV LINK LAYER CONTROLLER
(These errata refer to the data sheet dated 2000 June 6)
Philips Semiconductors
Errata To the PDI1394L21 1394 Full Duplex AV Link Layer Controller (Data Sheet dated: 2000 June 6).
March 1, 2000
E-4.
Link / PHY interface hang-up:
Description of expected operation:
When the subject node is root and also an isochronous talker, the
transmission of isochronous data packets will continue on the bus through all bus reset events and thereafter.
Description of observed behavior:
When root and an isochronous talker, after some bus reset events the L21
ceases to transmit isochronous data on the bus. The L21 actually requests access to the bus too late in the bus
cycle for isochronous transmission, this causes the PHY to ignore the request while the L21 waits for the PHY to
grant the isochronous access. The L21 waits in this state indefinitely, or until the next bus reset event. If another
isochronous talker is present on the bus, the L21 hang-up will not occur.
Solution or work around:
If the L21 is used with Philips P11A PHY there is a chance of this misoperation
occurring. The L21 has been tested with the Philips P21, 400 Mbps PHY and the problem does not occur. If the
L21 is an isochronous talker, but not root, the problem does not occur. If it is desired to send isochronous data on
the bus, first send a PHY configuration packet to another node on the bus followed by a bus reset to make that
node root (before starting isochronous transmission).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PDI1394L41 | Content Protection AV Link Layer(內(nèi)容可保護(hù)的AV鏈接層控制器) |
| PDI1394P21 | 3-port Physical Layer Interface(三端口物理層接口) |
| PDI1394P22 | 3-port Physical Layer Interface(三端口物理層接口) |
| PDI1394P24 | 2-port 400 Mbps physical layer interface(2端口 400 Mbps物理層接口) |
| PDI40C1D00 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDI1394L21BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 full duplex AV link layer controller |
| PDI1394L21BP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 full duplex AV link layer controller |
| PDI1394L40 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 enhanced AV link layer controller |
| PDI1394L40BE | 制造商:NXP Semiconductors 功能描述:1 CHANNEL(S), 400M BPS, SERIAL COMM CONTROLLER, PQFP144 |
| PDI1394L40BE,518 | 功能描述:視頻 IC 1394 A/V LINK LAYER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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