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參數(shù)資料
| 型號： | PDIUSBD12PW |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | nullUSB interface device with parallel bus |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDSO28 |
| 封裝： | 4.40 MM , PLASTIC, MO-153, SOT-361-1, TSSOP-28 |
| 文件頁數(shù)： | 14/35頁 |
| 文件大?。?/td> | 838K |
| 代理商： | PDIUSBD12PW |
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Philips Semiconductors
PDIUSBD12
USB interface device with parallel bus
Product data
Rev. 08 — 20 December 2001
14 of 35
9397 750 09238
Koninklijke Philips Electronics N.V. 2001. All rights reserved.
11.2.4
Set DMA
Code (Hex) —
FB
Transaction —
read/write 1 byte
The set DMA command is followed by one data write/read to/from the DMA
configuration register.
DMA Configuration register:
During DMA operation, the two-byte buffer header
(status and byte length information) is not transferred to/from the local CPU. This
allows DMA data to be continuous and not interleaved by chunks of these headers.
For DMA read operations, the header will be skipped by the PDIUSBD12. See
Section 11.3.5 “Read buffer”
command. For DMA write operations, the header will be
automatically added by the PDIUSBD12. This provides for a clean and simple DMA
data transfer.
Table 6:
Bit
7
Clock division factor byte: bit allocation
Symbol
Description
SOF-ONLY
INTERRUPT MODE
due to the Start Of Frame clock (SOF) only, regardless of the
setting of Pin-Interrupt mode, bit 5 of set DMA.
SET_TO_ONE
This bit needs to be set to 1 prior to any DMA read or DMA write
operation. This bit should always be set to 1 after power. It is
zero after Power-on reset.
3 to 0 CLOCK DIVISION
FACTOR
output frequency is 48 MHz/(N+1) where N is the Clock Division
Factor. The reset value is 11. This will produce the output
frequency of 4 MHz which can then be programmed up or down
by the user. The minimum value is 1 giving the range of
frequency from 4 to 24 MHz. The minimum value of N is 0,
giving a maximum frequency of 48 MHz. The maximum value of
N is 11 giving a minimum frequency of 4 MHz. The PDIUSBD12
design ensures no glitching during frequency change. The
programmed value will not be changed by a bus reset.
Setting this bit to 1 will cause the interrupt line to be activated
6
The value indicates the clock division factor for CLKOUT. The
See
Table 7
for bit allocation.
Fig 8.
Set DMA command.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDIUSBD12PW,112 | 功能描述:USB 接口集成電路 USB I-FACE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| PDIUSBD12PW,118 | 功能描述:USB 接口集成電路 USB INTRFC W/PARL RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| PDIUSBD12PW112 | 制造商:ST-Ericsson 功能描述:INTERFACE USB W/PARALLEL BUS 28TSSOP |
| PDIUSBD12PWAA | 功能描述:IC USB INTRFC W/PARL BUS 28TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| PDIUSBD12PWDH | 功能描述:USB 接口集成電路 USB I-FACE W/PARALLEL BUS RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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