
FALC
56
PEF 2256 H/E
Functional Description T1/J1
User’s Manual
Hardware Description
165
DS1.1, 2003-10-23
which shall be latched on ports XDI and XP(A:D) is programmable by bits
SIC2.SICS(2:0), the remaining channel phases are cleared or ignored respectively.
The following table gives an overview of the transmit buffer operating modes.
5.4.5
Programmable Pulse Shaper and Line Build-Out (T1/J1)
In long-haul applications the transmit pulse masks are optionally generated according to
FCC68 and ANSI T1. 403. To reduce the crosstalk on the received signals the
FALC
56 offers the ability to place a transmit attenuator in the data path. Transmit
attenuation is selectable from 0, -7.5, -15 or -22.5 dB (register LIM2.LBO2/1). ANSI T1.
403 defines only 0 to -15 dB.
The FALC
56 includes a programmable pulse shaper to satisfy the requirements of
ANSI T1. 102, also various DS1, DSX-1 specifications are met. The amplitude of the
pulse shaper is individually programmable by the microprocessor to allow a maximum of
different pulse templates. The line length is selected by programming the registers
XPM(2:0) as shown for typical values in
Table 42
below.
The transmitter requires an external step up transformer to drive the line. The values are
optimized for a transformer ratio of 1:2.4 and cable type PULP 22AWG (100
). Other
external configurations require an adaption of these values.
Table 41
Buffer Size
Bypass
Short buffer
1 frame
2 frames
Transmit Buffer Operating Modes (T1/J1)
TS Offset programming
Enabled
Disabled
Enabled
Enabled
Slip performance
No
Yes
Yes
Yes
Table 42
Range in
m
Pulse Shaper Programming (T1/J1)
Range in
ft.
hexadecimal
Serial Resistor Value: 2
0 to 40
0 to 133
95
40 to 81
133 to 266 B6
81 to 122
266 to 399 D9
122 to 162
399 to 533 FC
162 to 200
533 to 655 1E
XPM0
XPM1
XPM2
XP04-
XP00
XP14-
XP10
XP24-
XP20
XP34-
XP30
decimal
16
1E
26
36
C3
1
1
1
1
1