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Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHX9NQ20T , PHF9NQ20T
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
E
AS
Non-repetitive avalanche
energy
CONDITIONS
Unclamped inductive load, I
= 7.2A;
t
p
= 100
μ
s; T
j
prior to avalanche = 25C;
V
≤
25 V; R
GS
= 50
; V
GS
= 10 V; refer
to fig;15
MIN.
-
MAX.
93
UNIT
mJ
I
AS
Peak non-repetitive
avalanche current
-
8.7
A
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-hs
Thermal resistance junction
to mounting base
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
MIN.
-
TYP. MAX. UNIT
-
5
K/W
SOT186A package, in free air
-
55
-
K/W
ELECTRICAL CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL PARAMETER
V
(BR)DSS
Drain-source breakdown
voltage
V
GS(TO)
Gate threshold voltage
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA;
MIN.
200
178
2
1
-
-
-
3.8
-
-
-
-
-
-
TYP. MAX. UNIT
-
-
-
-
3
4
-
-
6
300
400
-
0.94
6
-
10
100
0.05
10
-
500
24
-
4
-
12
-
V
V
V
V
V
T
j
= -55C
V
DS
= V
GS
; I
D
= 1 mA
T
j
= 150C
T
j
= -55C
R
DS(ON)
Drain-source on-state
resistance
Forward transconductance
Gate source leakage current V
GS
=
±
10 V; V
DS
= 0 V
Zero gate voltage drain
current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
V
GS
= 10 V; I
D
= 4.5 A
m
S
nA
μ
A
μ
A
nC
nC
nC
T
j
= 150C
g
fs
I
GSS
I
DSS
V
DS
= 25 V; I
= 4.5 A
V
DS
= 200 V; V
GS
= 0 V
T
j
= 150C
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
s
I
D
= 9 A; V
DD
= 160 V; V
GS
= 10 V
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal source inductance
V
DD
= 100 V; R
= 10
;
V
= 10 V; R
G
= 5.6
Resistive load
-
-
-
-
-
-
8
-
-
-
-
-
-
ns
ns
ns
ns
nH
nH
19
25
15
4.5
7.5
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
-
-
-
959
93
54
-
-
-
pF
pF
pF
November 2000
2
Rev 1.100