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參數(shù)資料
| 型號： | PI6C102H |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | DIP Socket; No. of Contacts:16; Pitch Spacing:0.1"; Row Spacing:0.3"; Terminal Type:PCB; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| 中文描述： | 精密時鐘合成器移動PC |
| 文件頁數(shù)： | 3/11頁 |
| 文件大?。?/td> | 588K |
| 代理商： | PI6C102H |
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PS8164A 09/29/00
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PI6C102
Precision Clock Synthesizer for Mobile PCs
Power Management Timing
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Notes:
1. Clock on/off latency is defined as the number of rising edges of free running PCICLKs
between when the clock disable goes low/high to when the first valid clock comes out of
the device.
2. Power-up latency is from when PWR_DWN# goes inactive (HIGH) to when the first valid
clocks are driven from the device.
CPU_STOP# is an input signal used to turn off the CPU clocks for
low power operation. CPU_STOP# is asserted asynchronously by
the external clock control logic with the rising edge of free running
PCI clock and is internally synchronized to the external PCICLK_F
output. All other clocks continue to run while the CPU clocks are
CPU_STOP# Timing Diagram
Notes:
1. All timing is referenced to the CPUCLK.
2. The Internal label means inside the chip and is a reference only.
3 CPU_STOP# is an input signal that must be made synchronous to the free running PCI_F.
4. ON/OFF latency shown in the diagram is 2 CPU clocks.
5. All other clocks continue to run undisturbed.
6. PWR_DWN# and PCI_STOP# are shown in a HIGH state.
7. Diagrams shown with respect to 66 MHz. Similar operation as CPU = 100 MHz.
disabled. The CPU clocks are always stopped in a LOW state and
started guaranteeing that the high pulse width is a full pulse. CPU
clock on latency is 2 or 3 CPU clocks and CPU clock off latency
is 2 or 3 CPU clocks.
CPUCLK
(Internal)
CPUCLK
(Internal)
PCICLK_F
(Free-running)
CPU_STOP#
PCI_STOP#
PWR_DWN#
CPUCLK
(External)
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PDF描述 |
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| PI6C104 | Spread Spectrum Clock Synthesizer for Desktop Pentium II |
| PI6C104H | Spread Spectrum Clock Synthesizer for Desktop Pentium II |
| PI6C104S | Spread Spectrum Clock Synthesizer for Desktop Pentium II |
| PI6C106 | Pentium/Pro System Clock Chip |
| PI6C180B | Precision 1-18 Clock Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI6C103 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Precision Clock Synthesizer |
| PI6C103-05L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| PI6C103-06L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| PI6C103H | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Precision Clock Synthesizer |
| PI6C103HE | 功能描述:鎖相環(huán) - PLL Mobile Clck Generatr RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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