![](http://datasheet.mmic.net.cn/260000/PI74FCT162H374T_datasheet_15942114/PI74FCT162H374T_1.png)
PI74FCT16374/162374/162H374T
16-BIT REGISTERS (3-STATE)
PI74FCT162H374T
1
PS2034A 03/28/01
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Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are
produced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16374T, PI74FCT162374T, and PI74FCT162H374T
are 16-bit octal registers designed with 16 D-type flip-flops with a
buffered common clock and 3-state outputs. The Output Enable
(xOE) and clock (xCLK) controls are organized to operate as
two 8-bit registers or one 16-bit register. When OE is HIGH, the
outputs are in the high impedance state. Input data meeting the
setup and hold time requirements of the D inputs is transferred to
the O outputs on the LOW-to-HIGH transition of the clock input.
The PI74FCT16374T output buffers are designed with a Power-Off
disable allowing “l(fā)ive insertion” of boards when used as backplane
drivers.
The PI74FCT162374T has ±24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H374T has “Bus Hold” which retains the input’s
last state whenever the input goes to high-impedance preventing
“floating” inputs and eliminating the need for pull-up/down
resistors.
Product Features:
Common Features:
PI74FCT16374T, PI74FCT162374T, and PI74FCT162H374T
are high-speed,
low power devices with high current drive.
Vcc = 5V ±10%
Hysteresis on all inputs
Packages available:
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 300 mil wide plastic SSOP (V)
PI74FCT16374T Features:
High output drive: I
OH
= –32 mA; I
OL
= 64 mA
Power off disable outputs permit "live insertion"
Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25°C
PI74FCT162374T Features:
Balanced output drivers: ±24 mA
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25°C
PI74FCT162H374T Features:
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull-up resistors
Logic Block Diagram
Fast CMOS 16-Bit
Registers (3-State)
1
OE
1
CLK
1
O
0
C
D
1
D
0
TO 7 OTHER CHANNELS
2
OE
2
CLK
2
O
0
C
D
2
D
0
TO 7 OTHER CHANNELS