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參數資料
| 型號： | PIC12CE674/JW |
| 廠商： | Microchip Technology |
| 文件頁數： | 55/129頁 |
| 文件大小： | 0K |
| 描述： | IC MCU EPROM 2KX14 A/D&EE 8CDIP |
| 標準包裝： | 56 |
| 系列： | PIC® 12C |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 10MHz |
| 外圍設備： | POR，WDT |
| 輸入/輸出數： | 5 |
| 程序存儲器容量： | 3.5KB（2K x 14） |
| 程序存儲器類型： | EPROM，UV |
| EEPROM 大?。?/td> | 16 x 8 |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數據轉換器： | A/D 4x8b |
| 振蕩器型： | 內部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 8-CDIP（0.300"，7.62mm）窗口 |
| 包裝： | 管件 |
| 配用： | ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
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1999 Microchip Technology Inc.
DS30561B-page 31
PIC12C67X
TABLE 5-1:
SUMMARY OF PORT REGISTERS
5.4
I/O Programming Considerations
5.4.1
BI-DIRECTIONAL I/O PORTS
Any instruction which writes, operates internally as a
read followed by a write operation. The BCF and BSF
instructions, for example, read the register into the
CPU, execute the bit operation and write the result back
to the register. Caution must be used when these
instructions are applied to a port with both inputs and
outputs defined. For example, a BSF operation on bit5
of GPIO will cause all eight bits of GPIO to be read into
the CPU. Then the BSF operation takes place on bit5
and GPIO is written to the output latches. If another bit
of GPIO is used as a bi-directional I/O pin (i.e., bit0) and
it is defined as an input at this time, the input signal
present on the pin itself would be read into the CPU and
rewritten to the data latch of this particular pin, overwrit-
ing the previous content. As long as the pin stays in the
input mode, no problem occurs. However, if bit0 is
switched to an output, the content of the data latch may
now be unknown.
Reading the port register reads the values of the port
pins. Writing to the port register writes the value to the
port latch. When using read-modify-write instructions
(i.e., BCF, BSF, etc.) on a port, the value of the port
pins is read, the desired operation is done to this value,
and this value is then written to the port latch.
Example 5-1 shows the effect of two sequential read-
modify-write instructions on an I/O port.
EXAMPLE 5-1:
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
;Initial GPIO Settings
; GPIO<5:3> Inputs
; GPIO<2:0> Outputs
;
GPIO latch
GPIO pins
;
----------
BCF
GPIO, 5
;--01 -ppp
--11 pppp
BCF
GPIO, 4
;--10 -ppp
--11 pppp
MOVLW 007h
;
TRIS
GPIO
;--10 -ppp
--10 pppp
;
;Note that the user may have expected the pin
;values to be --00 pppp. The 2nd BCF caused
;GP5 to be latched as the pin value (High).
A pin actively outputting a Low or High should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage the
chip.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on
all other
Resets
85h
TRIS
—
GPIO Data Direction Register
--11 1111
81h
OPTION
GPPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
03h
STATUS
IRP(1)
RP1(1)
RP0
TO
PD
ZDC
C
0001 1xxx
000q quuu
05h
GPIO
SCL(2)
SDA(2)
GP5
GP4
GP3
GP2
GP1
GP0
11xx xxxx
11uu uuuu
Legend: Shaded cells not used by Port Registers, read as ‘0’, — = unimplemented, read as '0', x = unknown, u = unchanged,
q = see tables in Section 9.4 for possible values.
Note 1:
The IRP and RP1 bits are reserved on the PIC12C67X; always maintain these bits clear.
2: The SCL and SDA bits are unimplemented on the PIC12C671 and PIC12C672.
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