參數(shù)資料
型號(hào): PIC12F510-I/MC
廠商: Microchip Technology
文件頁(yè)數(shù): 13/39頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 1024X12 8DFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 150
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 8MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲(chǔ)器容量: 1.5KB(1K x 12)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 38 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-VFDFN 裸露焊盤
包裝: 管件
產(chǎn)品目錄頁(yè)面: 637 (CN2011-ZH PDF)
配用: AC164334-ND - MODULE SOCKET FOR 8L 2X3MM DFN
AC163022-ND - ADAPTER UNIVERSAL PROG PIC12F5XX
AC162070-ND - HEADER INTRFC MPLAB ICD2 8/14P
XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN
20
6462AS–ATARM–03-Jun-09
AT91SAM9G10
9.1
Block Diagram
Figure 9-1.
System Controller Block Diagram
NRST
SLCK
Advanced
Interrupt
Controller
Real-Time
Timer
Periodic
Interval
Timer
Reset
Controller
PA0-PA31
periph_nreset
System Controller
Watchdog
Timer
wdt_fault
WDRPROC
PIO
Controllers
Power
Management
Controller
XIN
XOUT
PLLRCA
MAINCK
PLLACK
pit_irq
MCK
proc_nreset
wdt_irq
periph_irq{2..4]
periph_nreset
periph_clk[2..21]
PCK
MCK
pmc_irq
UDPCK
nirq
nfiq
rtt_irq
Embedded
Peripherals
periph_clk[2..4]
pck[0-3]
in
out
enable
ARM926EJ-S
SLCK
irq0-irq2
fiq
irq0-irq2
fiq
periph_irq[6..21]
periph_irq[2..21]
int
periph_nreset
periph_clk[6..21]
jtag_nreset
ice_nreset
proc_nreset
periph_nreset
dbgu_txd
dbgu_rxd
pit_irq
rtt_irq
dbgu_irq
pmc_irq
rstc_irq
wdt_irq
rstc_irq
SLCK
Boundary Scan
TAP Controller
jtag_nreset
debug
PCK
debug
idle
debug
Bus Matrix
MCK
periph_nreset
proc_nreset
backup_nreset
periph_nreset
idle
Debug
Unit
dbgu_irq
MCK
dbgu_rxd
periph_nreset
force_ntrst
dbgu_txd
USB Device
Port
UDPCK
periph_nreset
periph_clk[10]
periph_irq[10]
usb_suspend
rtt_alarm
Shutdown
Controller
SLCK
rtt_alarm
backup_nreset
SHDN
WKUP
4 General-purpose
Backup Registers
backup_nreset
XIN32
XOUT32
LCDCK
PLLRCB
PLLBCK
UHPCK
PB0-PB31
PC0-PC31
USB Host
Port
UHPCK
periph_nreset
periph_clk[20]
periph_irq[20]
LCD
Controller
LCDCK
periph_nreset
periph_clk[21]
periph_irq[21]
VDDBU Powered
VDDCORE Powered
force_ntrst
ntrst
VDDCORE
POR
MAIN
OSC
PLLA
VDDBU
POR
SLOW
CLOCK
OSC
PLLB
ice_nreset
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