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參數(shù)資料
| 型號： | PIC12F635T-I/SN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 61/74頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 1KX14 8SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 系列： | PIC® 12F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲器容量： | 1.75KB（1K x 14） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 128 x 8 |
| RAM 容量： | 64 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 帶卷 (TR) |
| 配用： | AC162057-ND - MPLAB ICD 2 HEADER 14DIP |
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Micrel, Inc.
KSZ8841-PMQL
October 2007
64
M9999-100407-1.5
Offset
Counter Name
Description
octets in length.
0x12
Rx512to1023Octets
Total Rx packets (bad packets included) that are between 512 and
1023 octets in length.
0x13
Rx1024to1522Octets
Total Rx packets (bad packets included) that are between 1024 and
1522 octets in length (upper limit depends on max packet size setting).
0x14
TxByte
Tx good octet count, including PAUSE packets.
0x15
Reserved. Do not write to this register.
0x16
TxLateCollision
The number of times a collision is detected later than 512 bit-times into
the Tx of a packet.
0x17
TxPausePkts
Number of PAUSE frames transmitted by a port.
0x18
TxBroadcastPkts
Tx good broadcast packets (not including error broadcast or valid
multicast packets).
0x19
TxMulticastPkts
Tx good multicast packets (not including error multicast packets or valid
broadcast packets).
0x1A
TxUnicastPkts
Tx good unicast packets.
Table 5. Port 1’s MIB Counters Indirect Memory Offsets
Example: MIB Counter Read (read “Rx64Octets” counter at indirect address offset 0x0E)
Write to reg. IACR with 0x1C0E (set indirect address and trigger a read MIB counters operation)
Then:
Read reg. IADR5 (MIB counter value 31-16) // If bit 31 = 1, there was a counter overflow
// If bit 30 = 0, restart (reread) from this register
Read reg. IADR4 (MIB counter value 15-0)
Additional MIB Information
In the heaviest condition, the byte counter will overflow in 2 minutes. It is recommended that the software read all the
counters at least every 30 seconds.
MIB counters are designed as “read clear”. That is, these counters will be cleared after they are read.
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