PIC14000
DS40122B-page 44
Preliminary
1996 Microchip Technology Inc.
TABLE 7-1:
I2C BUS TERMINOLOGY
Term
Description
Transmitter
The device that sends the data to the bus.
Receiver
The device that receives the data from the bus.
Master
The device which initiates the transfer, generates the clock, and terminates the transfer.
Slave
The device addressed by a master.
Multi-master
More than one master device in a system. These masters can attempt to control the bus
at the same time without corrupting the message.
Arbitration
Procedure that ensures that only one of the master devices will control the bus. This
ensures that the transfer data does not get corrupted.
Synchronization
Procedure where the clock signals of two or more devices are synchronized.
FIGURE 7-4:
I2C 7-BIT ADDRESS FORMAT
FIGURE 7-5:
I2C 10-BIT ADDRESS
FORMAT
S
R/W ACK
Sent by
Slave
slave address
S
R/W
Read/Write pulse
MSb
LSb
Start Condition
ACK
Acknowledge
sent by slave
= 0 for write
S1
S
R/W
ACK
11 1 0 A9 A8 RW ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK
-
Start Condition
Read/Write Pulse
Acknowledge
7.2
Addressing I2C Devices
There are two address formats. The simplest is the
address is the most signicant seven bits of the byte.
For example when loading the I2CADD register, the
least signicant bit is a “don’t care”. The more complex
10-bit address format, two bytes must be transmitted
with the rst ve bits specifying this to be a 10-bit
address.