PIC16C62B/72A
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 113
INDEX
A
A/D
.....................................................................................49
A/D Converter Enable (ADIE Bit)
...............................14
A/D Converter Flag (ADIF Bit)
............................ 15
,
51
A/D Converter Interrupt, Configuring
.........................51
ADCON0 Register
................................................ 9
,
49
ADCON1 Register
........................................10
,
49
,
50
ADRES Register
.............................................9
,
49
,
51
Analog Port Pins
..........................................................6
Analog Port Pins, Configuring
...................................53
Block Diagram
...........................................................51
Block Diagram, Analog Input Model
..........................52
Channel Select (CHS2:CHS0 Bits)
............................49
Clock Select (ADCS1:ADCS0 Bits)
...........................49
Configuring the Module
.............................................51
Conversion Clock (T
AD
)
.............................................53
Conversion Status (GO/DONE Bit)
..................... 49
,
51
Conversions
...............................................................54
Converter Characteristics
........................................101
Module On/Off (ADON Bit)
........................................49
Port Configuration Control (PCFG2:PCFG0 Bits)
......50
Sampling Requirements
............................................52
Special Event Trigger (CCP)
.............................. 35
,
54
Timing Diagram
.......................................................102
Absolute Maximum Ratings
...............................................81
ADCON0 Register
........................................................ 9
,
49
ADCS1:ADCS0 Bits
...................................................49
ADON Bit
...................................................................49
CHS2:CHS0 Bits
.......................................................49
GO/DONE Bit
..................................................... 49
,
51
ADCON1 Register
................................................10
,
49
,
50
PCFG2:PCFG0 Bits
...................................................50
ADRES Register
.....................................................9
,
49
,
51
Architecture
PIC16C62B/PIC16C72A Block Diagram
.....................5
Assembler
MPASM Assembler
...................................................75
B
Banking, Data Memory
................................................. 8
,
11
Brown-out Reset (BOR)
.......................... 55
,
57
,
59
,
60
,
61
BOR Enable (BODEN Bit)
.........................................55
BOR Status (BOR Bit)
...............................................16
Timing Diagram
.........................................................92
C
Capture (CCP Module)
......................................................34
Block Diagram
...........................................................34
CCP Pin Configuration
..............................................34
CCPR1H:CCPR1L Registers
....................................34
Changing Between Capture Prescalers
....................34
Software Interrupt
......................................................34
Timer1 Mode Selection
..............................................34
Capture/Compare/PWM
Interaction of Two CCP Modules
...............................33
Capture/Compare/PWM (CCP)
.........................................33
CCP1CON Register
.............................................. 9
,
33
CCPR1H Register
................................................ 9
,
33
CCPR1L Register
................................................. 9
,
33
Enable (CCP1IE Bit)
..................................................14
Flag (CCP1IF Bit)
......................................................15
RC2/CCP1 Pin
.............................................................6
Timer Resources
.......................................................33
Timing Diagram
.........................................................94
CCP1CON Register
.......................................................... 33
CCP1M3:CCP1M0 Bits
............................................. 33
CCP1X:CCP1Y Bits
.................................................. 33
Code Protection
...........................................................55
,
66
CP1:CP0 Bits
............................................................ 55
Compare (CCP Module)
.................................................... 35
Block Diagram
........................................................... 35
CCP Pin Configuration
.............................................. 35
CCPR1H:CCPR1L Registers
.................................... 35
Software Interrupt
...................................................... 35
Special Event Trigger
...................................29
,
35
,
54
Timer1 Mode Selection
............................................. 35
Configuration Bits
.............................................................. 55
Conversion Considerations
............................................. 111
D
Data Memory
....................................................................... 8
Bank Select (RP1:RP0 Bits)
..................................8
,
11
General Purpose Registers
......................................... 8
Register File Map
........................................................ 8
Special Function Registers
......................................... 9
DC Characteristics
......................................................84
,
86
Development Support
........................................................ 75
Direct Addressing
.............................................................. 18
E
Electrical Characteristics
................................................... 81
Errata
................................................................................... 3
External Power-on Reset Circuit
....................................... 59
F
Firmware Instructions
........................................................ 67
I
I/O Ports
............................................................................ 19
I
2
C (SSP Module)
.............................................................. 41
ACK Pulse
.......................................41
,
42
,
43
,
44
,
45
Addressing
................................................................ 42
Block Diagram
........................................................... 41
Buffer Full Status (BF Bit)
......................................... 46
Clock Polarity Select (CKP Bit)
................................. 47
Data/Address (D/A Bit)
.............................................. 46
Master Mode
............................................................. 45
Mode Select (SSPM3:SSPM0 Bits)
.......................... 47
Multi-Master Mode
.................................................... 45
Read/Write Bit Information (R/W Bit)
.... 42
,
43
,
44
,
46
Receive Overflow Indicator (SSPOV Bit)
.................. 47
Reception
.................................................................. 43
Reception Timing Diagram
........................................ 43
Slave Mode
............................................................... 41
Start (S Bit)
..........................................................45
,
46
Stop (P Bit)
..........................................................45
,
46
Synchronous Serial Port Enable (SSPEN Bit)
.......... 47
Timing Diagram, Data
............................................. 100
Timing Diagram, Start/Stop Bits
................................ 99
Transmission
............................................................. 44
Update Address (UA Bit)
........................................... 46
ID Locations
................................................................55
,
66
In-Circuit Serial Programming (ICSP)
.........................55
,
66
Indirect Addressing
............................................................ 18
FSR Register
....................................................8
,
9
,
18
INDF Register
............................................................. 9
Instruction Format
............................................................. 67