PIC16C62B/72A
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 115
PIR1 Register
............................................................... 9
,
15
ADIF Bit
.....................................................................15
CCP1IF Bit
.................................................................15
SSPIF Bit
...................................................................15
TMR1IF Bit
................................................................15
TMR2IF Bit
................................................................15
Pointer, FSR
......................................................................18
PORTA
................................................................................6
Analog Port Pins
..........................................................6
PORTA Register
................................................... 9
,
19
RA3:RA0 and RA5 Port Pins
.....................................19
RA4/T0CKI Pin
..................................................... 6
,
19
RA5/SS/AN4 Pin
................................................... 6
,
39
TRISA Register
................................................... 10
,
19
PORTB
................................................................................6
PORTB Register
................................................... 9
,
21
Pull-up Enable (RBPU Bit)
.........................................12
RB0/INT Edge Select (INTEDG Bit)
..........................12
RB0/INT Pin, External
.......................................... 6
,
63
RB3:RB0 Port Pins
....................................................21
RB7:RB4 Interrupt on Change
...................................63
RB7:RB4 Interrupt on Change
Enable (RBIE Bit)
............................................... 13
,
63
RB7:RB4 Interrupt on Change
Flag (RBIF Bit)
..............................................13
,
21
,
63
RB7:RB4 Port Pins
....................................................21
TRISB Register
................................................... 10
,
21
PORTC
................................................................................6
Block Diagram
...........................................................23
PORTC Register
................................................... 9
,
23
RC0/T1OSO/T1CKI Pin
...............................................6
RC1/T1OSI Pin
............................................................6
RC2/CCP1 Pin
.............................................................6
RC3/SCK/SCL Pin
................................................ 6
,
39
RC4/SDI/SDA Pin
................................................. 6
,
39
RC5/SDO Pin
....................................................... 6
,
39
RC6 Pin
.......................................................................6
RC7 Pin
.......................................................................6
TRISC Register
.................................................. 10
,
23
Postscaler, Timer2
Select (TOUTPS3:TOUTPS0 Bits)
............................31
Postscaler, WDT
................................................................25
Assignment (PSA Bit)
......................................... 12
,
25
Block Diagram
...........................................................26
Rate Select (PS2:PS0 Bits)
................................ 12
,
25
Switching Between Timer0 and WDT
........................26
Power-on Reset (POR)
........................... 55
,
57
,
59
,
60
,
61
Oscillator Start-up Timer (OST)
.......................... 55
,
59
POR Status (POR Bit)
...............................................16
Power Control (PCON) Register
................................60
Power-down (PD Bit)
.......................................... 11
,
57
Power-on Reset Circuit, External
..............................59
Power-up Timer (PWRT)
.................................... 55
,
59
PWRT Enable (PWRTE Bit)
......................................55
Time-out (TO Bit)
................................................ 11
,
57
Time-out Sequence
...................................................60
Timing Diagram
.........................................................92
Prescaler, Capture
.............................................................34
Prescaler, Timer0
..............................................................25
Assignment (PSA Bit)
......................................... 12
,
25
Block Diagram
...........................................................26
Rate Select (PS2:PS0 Bits)
................................ 12
,
25
Switching Between Timer0 and WDT
........................26
Prescaler, Timer1
..............................................................28
Select (T1CKPS1:T1CKPS0 Bits)...............................27
Prescaler, Timer2
.............................................................. 36
Select (T2CKPS1:T2CKPS0 Bits)
............................. 31
PRO MATE
II Universal Programmer
............................. 77
Program Counter
PCL Register
.........................................................9
,
17
PCLATH Register
...........................................9
,
17
,
63
Reset Conditions
....................................................... 60
Program Memory
................................................................. 7
Interrupt Vector
........................................................... 7
Paging
...................................................................7
,
17
Program Memory Map
................................................ 7
Reset Vector
............................................................... 7
Program Verification
.......................................................... 66
Programming Pin (Vpp)
....................................................... 6
Programming, Device Instructions
.................................... 67
PWM (CCP Module)
.......................................................... 36
Block Diagram
........................................................... 36
CCPR1H:CCPR1L Registers
.................................... 36
Duty Cycle
................................................................. 36
Example Frequencies/Resolutions
............................ 37
Output Diagram
......................................................... 36
Period
........................................................................ 36
Set-Up for PWM Operation
....................................... 37
TMR2 to PR2 Match
............................................31
,
36
TMR2 to PR2 Match Enable (TMR2IE Bit)
................ 14
TMR2 to PR2 Match Flag (TMR2IF Bit)
.................... 15
Q
Q-Clock
............................................................................. 36
R
Register File
........................................................................ 8
Register File Map
................................................................ 8
Reset
...........................................................................55
,
57
Block Diagram
........................................................... 58
Reset Conditions for All Registers
............................ 61
Reset Conditions for PCON Register
........................ 60
Reset Conditions for Program Counter
..................... 60
Reset Conditions for STATUS Register
.................... 60
Timing Diagram
......................................................... 92
Revision History
.............................................................. 111
S
SEEVAL
Evaluation and Programming System
............. 78
SLEEP
..................................................................55
,
57
,
65
Software Simulator (MPLAB-SIM)
..................................... 76
Special Features of the CPU
............................................. 55
Special Function Registers
.................................................. 9
Speed, Operating
................................................................ 1
SPI (SSP Module)
Block Diagram
........................................................... 39
Buffer Full Status (BF Bit)
......................................... 46
Clock Edge Select (CKE Bit)
..................................... 46
Clock Polarity Select (CKP Bit)
................................. 47
Data Input Sample Phase (SMP Bit)
......................... 46
Mode Select (SSPM3:SSPM0 Bits)
.......................... 47
Receive Overflow Indicator (SSPOV Bit)
.................. 47
Serial Clock (RC3/SCK/SCL)
.................................... 39
Serial Data In (RC4/SDI/SDA)
.................................. 39
Serial Data Out (RC5/SDO)
...................................... 39
Slave Select (RA5/SS/AN4)
...................................... 39
Synchronous Serial Port Enable (SSPEN Bit)
.......... 47