參數(shù)資料
型號(hào): PIC18F26J50-I/SP
廠商: Microchip Technology
文件頁(yè)數(shù): 10/32頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 64K 2V 28-DIP
產(chǎn)品培訓(xùn)模塊: XLP Deep Sleep Mode
PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 15
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器容量: 64KB(32K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2.15 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 657 (CN2011-ZH PDF)
配用: AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
PIC18F2XJXX/4XJXX FAMILY
DS39687E-page 18
2009 Microchip Technology Inc.
5.0
CONFIGURATION WORD
The Configuration Words of the PIC18F2XJXX/4XJXX
family devices are implemented as volatile memory
registers. All of the Configuration registers (CONFIG1L,
CONFIG1H, CONFIG2L, CONFIG2H, CONFIG3L,
CONFIG3H,
CONFIG4L
and
CONFIG4H)
are
automatically loaded following each device Reset.
The data for these registers is taken from the four Flash
Configuration Words located at the end of program
memory. Configuration data is stored in order, starting
with CONFIG1L in the lowest Flash address and
ending with CONFIG4H in the highest. The mapping to
specific Configuration Words is shown in Table 5-1.
Users should always reserve these locations for
Configuration Word data and write their application
code accordingly.
The upper four bits of each Flash Configuration Word
should always be stored in program memory as ‘1111’.
This is done so these program memory addresses will
always be ‘1111 xxxx xxxx xxxx’ and interpreted
as a NOP instruction if they were ever to be executed.
Because the corresponding bits in the Configuration
registers are unimplemented, they will not change the
device’s configuration.
The Configuration and Device ID registers are
summarized in Table 5-2. A listing of the individual
Configuration bits and their options is provided in
TABLE 5-1:
MAPPING OF THE FLASH
CONFIGURATION WORDS TO
THE CONFIGURATION
REGISTERS
TABLE 5-2:
PIC18F45J10 FAMILY DEVICES: CONFIGURATION BITS AND DEVICE IDs
Configuration
Register
Flash
Configuration
Byte(1)
Configuration
Register
Address
CONFIG1L
XFF8h
300000h
CONFIG1H
XFF9h
300001h
CONFIG2L
XFFAh
300002h
CONFIG2H
XFFBh
300003h
CONFIG3L
XFFCh
300004h
CONFIG3H
XFFDh
300005h
CONFIG4L(2)
XFFEh
300006h
CONFIG4H(2)
XFFFh
300007h
Note 1: See Table 2-2 for the complete addresses
within code space for specific devices and
memory sizes.
2: Unimplemented in PIC18F45J10 family
devices.
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default/
Unprogrammed
Value
300000h CONFIG1L
DEBUG
XINST
STVREN
—WDTEN
111- ---1
300001h CONFIG1H
(1)
(2)
CP0
---- 01--
300002h CONFIG2L
IESO
FCMEN
—FOSC2
FOSC1
FOSC0
11-- -111
300003h CONFIG2H
(1)
WDTPS3
WDTPS2 WDTPS1 WDTPS0
---- 1111
300005h CONFIG3H
(1)
—CCP2MX
---- ---1
3FFFFEh DEVID1(3)
DEV2
DEV1
DEV0
REV4
REV3
REV2
REV1
REV0
See Table
3FFFFFh DEVID2(3)
DEV10
DEV9
DEV8
DEV7
DEV6
DEV5
DEV4
DEV3
See Table
Legend:
- = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Note 1:
The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if
it is accidentally executed.
2:
This bit should always be maintained at ‘0’.
3:
DEVID registers are read-only and cannot be programmed by the user.
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