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參數(shù)資料
| 型號(hào)： | PLC18V8ZIN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | PLD |
| 英文描述： | Delay On Break Timer |
| 中文描述： | OT PLD, 40 ns, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, SOT-146-1, DIP-20 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 225K |
| 代理商： | PLC18V8ZIN |
Philips Semiconductors
Product specification
PLC18V8Z
Zero standby power
CMOS versatile PAL devices
1997 Aug 08
9
DC ELECTRICAL CHARACTERISTICS
Commercial = 0
°≤
C
≤
T
amb
≤
+75
°
C, 4.75V
≤
V
CC
≤
5.25V;
Industrial = –40
°
C
≤
T
amb
≤
+85
°
C, 4.5V
≤
V
CC
≤
5.5V
LIMITS
TYP
1
SYMBOL
PARAMETER
TEST CONDITION
MIN
MAX
UNIT
Input voltage
V
IL
V
IH
Output voltage
2
Low
V
CC
= MIN
V
CC
= MAX
–0.3
0.8
V
High
2.0
V
CC
+ 0.3
V
V
OL
Low
V
CC
= MIN, I
OL
= 20
μ
A
V
CC
= MIN, I
OL
= 24mA
V
CC
= MIN, I
OH
= –3.2mA
V
CC
= MIN, I
OH
= –20
μ
A
0.100
0.500
V
V
V
OH
High
2.4
V
V
V
CC
– 0.1V
Input current
I
IL
I
IH
Output current
Low
7
V
IN
= GND
V
IN
= V
CC
–10
μ
A
μ
A
High
10
I
O(OFF)
Hi-Z state
V
OUT
= V
CC
V
OUT
= GND
V
OUT
= GND
10
–10
μ
A
μ
A
I
OS
I
CC
I
CC
/f
Capacitance
Short-circuit
3
–130
mA
V
CC
supply current (Standby)
V
CC
supply current (Active)
4
V
CC
= MAX, V
IN
= 0 or V
CC8
V
CC
= MAX (CMOS inputs)
5, 6
20
100
μ
A
1.5
mA/MHz
C
I
C
B
Input
V
CC
= 5V, V
IN
= 2.0V
V
B
= 2.0V
12
pF
I/O
15
pF
f(MHz)
45
30
15
00
6
12
18
24
30
I
100
μ
A
SP00018
Figure 1. I
CC
vs Frequency
5, 6
(Worst Case)
6
5
4
3
2
1
0
–1
–2
0
20 40 60 80 100 120 140 160 180 200
OUTPUT CAPACITANCE LOADING (pF)
t
SP00019
Figure 2.
t
PD
vs Output Capacitance
Loading (Typical)
NOTES:
1. All typical values are at V
CC
= 5V, T
amb
= +25
°
C.
2. All voltage values are with respect to network ground terminal.
3. Duration of short-circuit should not exceed one second. Test one at a time.
4. Tested with TTL input levels: V
IL
= 0.45V, V
IH
= 2.4V. Measured with all outputs switching.
5.
I
CC
/TTL input = 2mA.
6.
I
CC
vs frequency (registered configuration) = 2mA/MHz.
7. I
IL
/CLK) is
±
10
μ
A with V
IN
= 0.4V.
8. V
IN
includes CLK and OE if applicable.
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