參數(shù)資料
型號: PLDC20RA10
廠商: Cypress Semiconductor Corp.
英文描述: Reprogrammable Asynchronous CMOS Logic Device(重復(fù)編程異步CMOS邏輯器件)
中文描述: 可再編程邏輯器件的CMOS異步(重復(fù)編程異步的CMOS邏輯器件)
文件頁數(shù): 1/13頁
文件大?。?/td> 372K
代理商: PLDC20RA10
Reprogrammable Asynchronous
CMOS Logic Device
fax id: 6015
PLDC20RA10
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
December 1987 – Revised March 26, 1997
1PLDC20RA10
Features
Advanced-user programmable macrocell
CMOS EPROM technology for reprogrammability
Up to 20 input terms
10 programmable I/O macrocells
Output macrocell programmable as combinatorial or
asynchronous D-type registered output
Product-term control of register clock, reset and set
and output enable
Register preload and power-up reset
Four data product terms per output macrocell
Fast
—Commercial
t
PD
= 15 ns
t
CO
= 15 ns
t
SU
= 7 ns
—Military
t
PD
= 20 ns
t
CO
= 20 ns
t
SU
= 10 ns
Low power
—I
CC
max - 80 mA (Commercial)
—I
CC
max = 85 mA (Military)
High reliability
—Proven EPROM technology
—>2001V input protection
—100% programming and functional testing
Windowed DIP, windowed LCC, DIP, LCC, PLCC avail-
abl
e
Functional Description
The Cypress PLDC20RA10 is a high-performance, sec-
ond-generation programmable logic device employing a flexi-
ble macrocell structure that allows any individual output to be
configured independently as a combinatorial output or as a
fully asynchronous D-type registered output.
The Cypress PLDC20RA10 provides lower-power operation
with superior speed performance than functionally equivalent
bipolar devices through the use of high-performance 0.8-mi-
cron CMOS manufacturing technology.
The PLDC20RA10 is packaged in a 24 pin 300-mil molded
DIP, a 300-mil windowed cerDIP, and a 28-lead square lead-
less chip carrier, providing up to 20 inputs and 10 outputs.
When the windowed device is exposed to UV light, the
20RA10 is erased and can then be reprogrammed.
Logic Block Diagram
4
9
8
7
6
5
4
3
2
1
10
15
16
17
18
19
20
21
22
23
24
I
I
I
I
I
I
I
I
4
4
4
4
4
4
4
V
CC
11
12
13
14
I
V
SS
OE
4
4
I
I/O
9
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
I/O
2
I/O
1
I/O
0
4
4
4
4
4
4
4
4
4
4
MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
9
8
7
6
5
4
3
2
1
0
PL
RA10–1
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