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PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7341 S/UNI-IMA-84
DATASHEET
PMC-2000223
ISSUE 4
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
134
LINE_EN
When LINE_EN is set, line side traffic flow is enabled. This configuration bit
should be written to a one after the LINE_MODE has been configured and
prior to normal operation.
CTSCLK_SEL
When CTSCLK_SEL is set and LINE_MODE=”10”, the CTSCLK pin is used
as the clock for all Transmit Serial Line Clocks. When CTSCLK_SEL is not
set and LINE_MODE=”10”, the TSCLK[31:0] pins are used for all Transmit
Serial Line Clocks When LINE_MODE=01, CTSCLK_SEL is ignored.
MAX_DCB_DEPTH:
This indicates the number of cells that can be stored for a single link in the
external SDRAM. This determines the number of bits the RDAT will use for
the read and write pointers. To ensure correct operation, the user must
ensure that the proper amount of SDRAM is available. See Figure 10 for
details.
0) 256 cells per link
1) 1024 cells per link
CHAN_CD:
This indicates that the channelized cell delineation may be used.
Channelized cell delineation results in faster cell delineation since an octet by
octet search is performed instead of a bit by bit search. A nibble by nibble
search is performed if the SPE is in DS3 mode. This option may only be used
when operating with a channelized interface such as the SBI interface or the
clk/data interface in channelized mode. If any links are operating in
unchannelized mode, this bit may not be set.
0) Use bit by bit search for cell delineation. (Safe mode)
1) Use octet or nibble search for cell delineation (only should be set if
operating with channelized line interface for all links