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S/UNI-JET Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
49
Pin Name
Type
Pin
No.
Function
WRB
Input
B8
The Active low Write Strobe (WRB) signal is pulsed low
to enable a S/UNI-JET register write access. The D[7:0]
bus is clocked into the addressed register on the rising
edge of WRB while CSB is low.
RDB
Input
D9
The Active low Read Enable (RDB) signal is pulsed low
to enable a S/UNI-JET register read access. The S/UNI-
JET drives the D[7:0] bus with the contents of the
addressed register while RDB and CSB are both low.
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
I/O
D12
C13
A14
B14
D13
C14
A15
B15
The Bi-directional Data Bus (D[7:0]) is used during
S/UNI-JET register read and write accesses.
A[10]
A[9]
A[8]
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
Input
B9
B10
C10
A11
B11
C11
D11
A12
B12
C12
B13
The Address Bus (A[10:0]) selects specific registers
during S/UNI-JET register accesses.
RSTB
Input
C8
The Active low Reset (RSTB) signal is set low to
asynchronously reset the S/UNI-JET. RSTB is a Schmitt-
trigger input with an integral pull-up resistor.
ALE
Input
A8
The Address Latch Enable (ALE) is active-high and
latches the address bus A[10:0] when low. When ALE is
high, the internal address latches are transparent. It
allows the S/UNI-JET to interface to a multiplexed
address/data bus. ALE has an integral pull-up resistor.
INTB
Output
A7
The Active low Open-Drain Interrupt (INTB) signal goes
low when an unmasked interrupt event is detected on
any of the internal interrupt sources. Note: The INTB will
remain low until all active, unmasked interrupt sources
are acknowledged at their source.
TCK
Input
B6
The Test Clock (TCK) signal provides timing for test
operations that can be carried out using the IEEE
P1149.1 test access port.
TMS
Input
C7
The Test Mode Select (TMS) signal controls the test
operations that can be carried out using the IEEE
P1149.1 test access port. TMS is sampled on the rising
edge of TCK. TMS has an integral pull up resistor.
TDI
Input
D8
The Test Data Input (TDI) signal carries test data into the
S/UNI-JET via the IEEE P1149.1 test access port. TDI is
sampled on the rising edge of TCK. TDI has an integral
pull up resistor.