參數(shù)資料
型號(hào)： PowerPC 405CR
廠商： IBM Microeletronics
英文描述： 32-bit RISC Embedded Controllers(32位RISC結(jié)構(gòu)嵌入式控制器)
中文描述： 32位RISC嵌入式控制器（32位的RISC結(jié)構(gòu)嵌入式控制器）
文件頁(yè)數(shù)： 25/42頁(yè)
文件大?。?/td> 565K
代理商： POWERPC 405CR
PowerPC 405CR Embedded Controller Data Sheet
25
PerCS1:7[GPIO10:16]
Seven additional peripheral chip selects
or
General Purpose I/O - To access this function, software must
toggle a DCR register bit.
O[I/O]
5V tolerant
3.3V LVTTL
1,2
PerOE
Used by either peripheral controller or DMA controller depending
upon the type of transfer involved. When the PPC405CR is the
bus master, it enables the selected SDRAMs to drive the bus.
O
5V tolerant
3.3V LVTTL
2
PerR/W
Used by the PPC405CR when not in external master mode, as
output by either the peripheral controller or DMA controller
depending upon the type of transfer involved. High indicates a
read from memory, low indicates a write to memory.
Otherwise it used by the external master as an input to indicate
the direction of transfer.
I/O
5V tolerant
1, 2
PerReady
Used by a peripheral slave to indicate it is ready to transfer data.
I
5V tolerant
Rcvr
1, 2
PerBLast
Used by the PPC405CR when not in external master mode,
otherwise used by external master. Indicates the last transfer of a
memory access.
I/O
5V tolerant
3.3V LVTTL
1, 4
DMAReq0:3
DMAReq0:3 are used by slave peripherals to indicate they are
prepared to transfer data.
I
5V tolerant
Rcvr
1, 5
DMAAck0:3
DMAAck0:3 are used by the PPC405CR to indicate that data
transfers have occurred.
O
5V tolerant
3.3V LVTTL
6
EOT0:3[TC0:3]
End Of Transfer/Terminal Count
I/O
5V tolerant
3.3V LVTTL
1, 5
Signal Functional Description
(Part 2 of 6)
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
to 3.3V, 10k
to 5V
)
3. Must pull down (recommended value is 1k
)
4. If not used, must pull up (recommended value is 3k
to 3.3V)
5. If not used, must pull down (recommended value is 1k
)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
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