參數資料
型號: PowerPC 750
廠商: IBM Microeletronics
英文描述: 32-Bit Embedded Microprocessor(32位精簡指令集嵌入式微處理器)
中文描述: 32位嵌入式微處理器(32位精簡指令集嵌入式微處理器)
文件頁數: 6/46頁
文件大?。?/td> 610K
代理商: POWERPC 750
Page 2
Version 2.0
Datasheet
9/30/99
PowerPC 750 SCM RISC Microprocessor
PID8p-750
Preliminary Copy
Overview
The PID8p-750 is targeted for high performance, low power systems and supports the following power man-
agement features: doze, nap, sleep, and dynamic power management. The PID8p-750 consists of a proces-
sor core and an internal L2 Tag combined with a dedicated L2 cache interface and a 60x bus.
Figure 1 shows a block diagram of the PID8p-750.
Figure 1. PID8p-750 Block Diagram
FXU2
GPRs
LSU
FPU
Instruction Fetch
Branch Unit
System
Unit
Completion
Rename
Buffers
32K ICache
32K DCache
BHT /
BTIC
BIU
BIU
60X
L2 Cache
FXU1
L2 Tags
Dispatch
Control Unit
FPRs
Rename
Buffers
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