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參數(shù)資料
| 型號(hào)： | PP155 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 24/31頁 |
| 文件大?。?/td> | 600K |
| 代理商： | PP155 |
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24
Altera Corporation
Specifications
PPP Packet Processor 155 Mbps MegaCore Function (PP155) User Guide
ENABLE
0
RW
0: Disable packet transmission.
1: Enable packet transmission.
Clearing this bit to zero places the internal state variables in
the idle condition, clears the status registers and all transmit
performance monitor counts (good, error). Setting it enables
all functions.
0
TX_IS - Transmit Interrupt Register - ’h12
Field
Bits
Access
Function
Default
GOOD
2
RW1C
Set if a packet is transmitted correctly.
This bit is set by the transmission of a complete packet with
no errors.
0
ERR
1
RW1C
Set if a packet is aborted (atxerr asserted simultaneously
with atxeop).
This is set if atxerr is asserted. Software writes a 1 to this bit
to clear it.
0
UNDERFLOW
0
RW1C
Set if the FIFO has underflowed.
This bit is set if the Atlantic interface does not supply data
when required (i.e atxval = 0 in the middle of a packet). If
atxval is negated after sending a complete packet and
before starting a new packet no underflow is reported. An
underflow aborts the current packet and discards the
remainder. Subsequent packets are transmitted normally.
Software writes a 1 to this bit to clear it.
0
TX_IE - Transmit Interrupt Enable Register - ’h14
Field
Bits
Access
Function
Default
GOOD
ERR
2
RW
Enables the transmit good interrupt status.
0
0
0
1
RW
Enables the transmit err interrupt status.
UNDERFLOW
0
RW
Enables the transmit underflow interrupt status.
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