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| 型號(hào)： | PRODUCT |
| 英文描述： | Product Selection Guide 2002 |
| 中文描述： | 產(chǎn)品選型指南2002 |
| 文件頁(yè)數(shù)： | 14/26頁(yè) |
| 文件大?。?/td> | 1061K |
| 代理商： | PRODUCT |
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11
L8104 is packaged in a mini-BGA
resulting in a 60% savings in board
space
Combined Ethernet MAC and 8B10B
PCS
Data Rate - 1000 Mbps
64-Bit @ 66 Mhz Interface to External
Bus - 4 Gbps Bandwidth
10-Bit Interface (TBI) to External PHY
or SerDes Chip
16-Bit Interface to Internal Registers
and Management Counters
Full RMON, SNMP Ethernet
Management Counter Support
Independent Receive and Transmit
FIFO’s with Programmable
Watermarks
Receive FIFO Size - 16K Bytes
Transmit FIFO Size - 4K Bytes
AutoNegotiation Algorithm On Chip
Full Duplex Only
Flow Control per IEEE 802.3x
Automatic CRC Generation and
Checking
Automatic Packet Error Discarding
Programmable Transmit Start
Threshold
Interrupt Capability
Supports Fiber and Short Haul
Copper Media
Meets all applicable IEEE 802.3 and
802.3z Specifications
3.3 V Power Supply, 5 V Tolerant I/ O
L8101: 208L PQFP
(28 x 28 x 3.4 mm)
L8104: 208 mBGA
(17 x 17 x 1.5 mm)
SystemInterface
Controler
+PCS andRMON
SERDES
(Serializer/Deserializer)
L8101
L8104
Fiber-Optic Transceiver
Optical Fiber
L8101 and L8104
SecondGeneration Ggabt Ethernet
Controler (MACandPCS)
L8101 Block Diagram
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