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參數(shù)資料
| 型號(hào)： | PRODUCT |
| 英文描述： | Product Selection Guide 2002 |
| 中文描述： | 產(chǎn)品選型指南2002 |
| 文件頁(yè)數(shù)： | 16/26頁(yè) |
| 文件大小： | 1061K |
| 代理商： | PRODUCT |
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13
Low Power CMOS Technology
Single Channel 10/ 100 MBit Ethernet
Controller Optimized for Switching
Hub, Multiport Bridge/ Router, Server
Applications and Embedded Designs
Standard 10MBit/ sec Serial Mode or
Programmable MII Ethernet Interface
for 10/ 100 MBit/ sec Applications
Programmability of Double Word
Threshold Count for Space Available/
Data Available Ready Condition for
Transmit/ Receive FIFOs
Auto Retransmit Upon Collision Sense
Preamble Generation and Removal
Automatic 32-Bit FCS (CRC)
Generation and Checking
Collision Handling, Transmission
Deferral and Retransmission with
Automatic Jam and Backoff Functions
MII PHY Interface
Error Interrupt and Status Generation
Selectable Little Endian/ Big Endian
Transmit Byte Ordering for FIFO
Interface for Intel/ Motorola
Compatibility
128/ 128 Byte Independent Transmit/
Receive FIFOs with 32-Bit Data Path
Interface
- 1 G Bits/ sec (133 M Bytes/ sec)
Peak Data Rate in 32 Bit Mode.
Byte Ordering for FIFO Interface for
Intel/ Motorola Compatibility
5.0 V Power Supply
128 PQFP (14 x 20 x 2.7 mm)
Refer tocompete ethernet soutions
figure on page 4 for whoe illustration
L80C300
SystemInterface
Controler
L80C300
Full Dupex CMOS Ethernet 10/100
MBts/Sec Data Link Controler (MAC
L80C300 Block Diagram
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