參數(shù)資料
型號(hào)： Q67127-C2036SAB-C161R1-L16M
英文描述： IC-SM-16 BIT CPU
中文描述： 集成電路的Sm - 16位CPU
文件頁數(shù)： 41/121頁
文件大?。?/td> 1000K
代理商： Q67127-C2036SAB-C161R1-L16M
Semiconductor Group
6-7
On-Chip Peripheral Components
C501
6.1.1.1
Port 0 and Port 2 used as Address/Data Bus
As shown in
figure 6-7
and below in
figure 6-8
, the output drivers of ports 0 and 2 can be switched
to an internal address or address/data bus for use in external memory accesses. In this application
they cannot be used as general purpose I/O, even if not all address lines are used externally. The
switching is done by an internal control signal dependent on the input level at the EA pin and/or the
contents of the program counter. If the ports are configured as an address/data bus, the port latches
are disconnected from the driver circuit. During this time, the P2 SFR remains unchanged while the
P0 SFR has 1’s written to it. Being an address/data bus, port 0 uses a pullup FET as shown in
figure 6-7
. When a 16-bit address is used, port 2 uses the additional strong pullups p1 to emit 1’s
for the entire external memory cycle instead of the weak ones (p2 and p3) used during normal port
activity.
Figure 6-8
Port 2 Circuitry
MCS02123
D
CLK
Bit
Latch
Q
Q
Control
Addr.
MUX
Internal
Pull Up
Arrangement
V
CC
Port
Pin
Int. Bus
Write to
Latch
Pin
Read
Latch
Read
=1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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