參數(shù)資料
型號: Q67127-C2036SAB-C161R1-L16M
英文描述: IC-SM-16 BIT CPU
中文描述: 集成電路的Sm - 16位CPU
文件頁數(shù): 97/121頁
文件大?。?/td> 1000K
代理商: Q67127-C2036SAB-C161R1-L16M
OTP Memory Operation
C501
Semiconductor Group
9-4
9.5
OTP Memory Verification
If security bit 2 has not been programmed, the on-chip OTP program memory can be read out for
program verification. The address of the OTP program memory locations to be read is applied to
ports 1 and 2 as shown in
figure 9-30
. The other pins are held at the “Verify code data“ levels
indicated in
table 9-11
. The contents of the address location will be emitted on port 0. External
pullups are required on port 0 for this operation.
Figure 9-30
C501-1E OTP Memory Verification
If the encryption table has been programmed, the data presented at port 0 will be the exclusive NOR
of the program byte with one of the encryption bytes. The user will have to know the encryption table
contents in order to correctly decode the verification data. The encryption table itself cannot be read
out.
Reading the SIgnature Bytes
The signature bytes are read by the same procedure as a normal verification of locations 30H and
31H, except that P3.6 and P3.7 need to be pulled to a logic low level. The values of the signature
bytes are :
Address 30H : E0H indicates manufacturer
Address 31H : 71H indicates C501-1E
MCS03235
Port 1
RESET
P3.6
P3.7
XTAL2
XTAL1
V
SS
CC
V
Port 0
V
PP
EA/
ALE/PROG
PSEN
P2.7
P2.6
P2.0 - P2.4
10 k
Programming
Data
1
1
0
0
0
Enable
A8 - A12
A0 - A7
1
1
1
4 - 6 MHz
C501-1E
+5 V
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