FN6982.1 November 19, 2009 FIGURE 29. APPLICATION CIRCUIT FOR THE QLx4300-S45 EVALUATION BOARD USING THE SERIAL BUS INTERFACE FOR SETTING THE E" />
參數(shù)資料
型號: QLX4300SIQSR
廠商: Intersil
文件頁數(shù): 11/21頁
文件大?。?/td> 0K
描述: IC EQUALIZER REC 3.125GBPS 46QFN
標準包裝: 100
系列: QLx™
應用: 數(shù)據(jù)傳輸
接口: SMBus(2 線/I²C)
電源電壓: 1.1 V ~ 1.3 V
封裝/外殼: 46-WFQFN 裸露焊盤
供應商設備封裝: 46-TQFN
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
19
FN6982.1
November 19, 2009
FIGURE 29. APPLICATION CIRCUIT FOR THE QLx4300-S45 EVALUATION BOARD USING THE SERIAL BUS
INTERFACE FOR SETTING THE EQUALIZER COMPENSATION LEVEL
Typical Application Reference Designs (Continued)
Figures 28 and 29 show reference design schematics for a QLx4300-S45 evaluation board with an SMA connector
interface. Figure 28 shows the schematic for the case when the equalizer boost level is set via the CP pins. Figure 29
shows the schematic for the case when the level is set via the serial bus interface.
1
2
3
4
5
6
7
8
46
45
44
43
42
41
40
39
16
17
18
19
20
21
22
23
9
10
11
12
13
14
15
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
GND
IS2
IS1
MODE
IS4
IS3
1.2V
DT
IN1[P]
IN1[N]
IN2[P]
IN2[N]
IN3[P]
IN3[N]
IN4[P]
IN4[N]
OUT2[P]
OUT2[N]
OUT4[P]
OUT4[N]
OUT1[P]
OUT1[N]
OUT3[P]
OUT3[N]
6kO
BGREF
A
QLx4300-S45
1.2V
10
0
pF
*
10
n
F
Bypass circuit for each VDD pin: 4, 7, 10, 29, 32, 35
(*100pF capacitor should be positioned closest to the pin)
Detection threshold
reference current
QLx4300-S45
LANE EXTENDER
Reference
Serial Control Mode
Quellan, Inc.
= SMA Connector
A) DC Blocking Capacitors = X7R or COG
0.1F (>4GHz bandwidth)
Impedance Select (Channels 3 and 4)
Impedance Select (Channels 1 and 2)
DI
D
O
CP
3[A]
C
P3
[B
]
CP
3
[C
]
CP
4
[A
]
CP
4
[B
]
C
P4
[C
]
NC
Se
ria
lD
a
ta
I
n
S
er
ia
lDa
ta
O
ut
CL
K
EN
B
CP
1[A]
CP
1[B]
CP
1[C]
CP
2[A]
CP
2[B]
CP
2[C]
NC
S
er
ial
Cl
ock
In
En
ab
le
Ac
tiv
e
Lo
w
MODE at 1.2V: Serial Control Mode
MODE at GND: Binary Control Mode
1.2V
10
0k
47
nF
42
.2
k
Ω
QLx4300-S45
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