FN6982.1 November 19, 2009 Absolute Maximum Ratings Thermal Information Supply Voltage (VDD
參數(shù)資料
型號(hào)： QLX4300SIQSR
廠商： Intersil
文件頁(yè)數(shù)： 17/21頁(yè)
文件大小： 0K
描述： IC EQUALIZER REC 3.125GBPS 46QFN
標(biāo)準(zhǔn)包裝： 100
系列： QLx™
應(yīng)用： 數(shù)據(jù)傳輸
接口： SMBus（2 線/I²C）
電源電壓： 1.1 V ~ 1.3 V
封裝/外殼： 46-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 46-TQFN
包裝： 帶卷 (TR)
安裝類型： 表面貼裝
5
FN6982.1
November 19, 2009
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VDD to GND) . . . . . . . . . . . . -0.3V to 1.3V
Voltage at All Input Pins . . . . . . . . . . . -0.3V to VDD + 0.3V
ESD Rating at All Pins . . . . . . . . . . . . . . . . . . . . 2kV (HBM)
Thermal Resistance (Typical)
θJA (°C/W) θJc (°C/W)
46 Ld QFN Package (Note 1). . . . .
32
2.3
Operating Ambient Temperature Range. . . . . . 0°C to +70°C
Storage Ambient Temperature Range . . . . . -55°C to +150°C
Maximum Junction Temperature. . . . . . . . . . . . . . . +125°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
Operating Conditions
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Supply Voltage
VDD
1.1
1.2
1.3
V
Operating Ambient Temperature
TA
025
70
°C
Bit Rate
NRZ data applied to any channel
1.5
3.125
Gb/s
Control Pin Characteristics Typical values are at VDD = 1.2V, TA = +25°C, and VIN = 800mVP-P, unless otherwise
noted. VDD = 1.1V to 1.3V, TA = 0°C to +70°C.
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS NOTES
Input ‘LOW’ Logic Level
VIL
DI, Clk, ENB
0
350
mV
Input ‘HIGH’ Logic Level
VIH
DI, Clk, ENB
750
VDD
mV
Output ‘LOW’ Logic Level
VOL
IS[k], DO
0
250
mV
Output ‘HIGH’ Logic Level
VOH
IS[k], DO
1000
VDD
mV
‘LOW’ Resistance State
CP[k][A,B,C]
0
1
kΩ
‘MID’ Resistance State
CP[k][B,C]
22.5
25
27.5
kΩ
‘HIGH’ Resistance State
CP[k][A,B,C]
500
∞
kΩ
Input Current
Current draw on digital pin, i.e.,
CP[k][A,B,C], DI, Clk, ENB
30
100
A
NOTE:
2. If four CP pins are tied together, the resistance values in this table should be divided by four.
Electrical Specifications Typical values are at VDD = 1.2V, TA = +25°C, and VIN = 800mVP-P, unless otherwise noted.
VDD = 1.1V to 1.3V, TA = 0°C to +70°C.
PARAMETERS
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS NOTES
Supply Current
IDD
260
mA
Cable Input Amplitude
Range
VIN
Measured differentially at data source
before encountering channel loss
800
1200
1600
mVP-P
DC Differential Input
Resistance
Measured on input channel IN[k]
80
100
120
Ω
DC Single-Ended Input
Resistance
Measured on input channel IN[k]P or
IN[k]N
40
50
60
Ω
Input Return Loss
(Differential)
SDD11
50MHz to 3.75GHz
10
dB
Input Return Loss
(Common Mode)
SCC11
50MHz to 3.75GHz
6
dB
QLx4300-S45
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