FN6979.1 November 19, 2009 Operation The QLx4600-S30 is an advanced quad lane-extender for high-speed interconnects. A functional diagram of on" />
參數(shù)資料
型號(hào)： QLX4600SIQT7
廠商： Intersil
文件頁(yè)數(shù)： 4/23頁(yè)
文件大?。?/td> 0K
描述： IC EQUALIZER REC 6.25GBPS 46QFN
標(biāo)準(zhǔn)包裝： 1
系列： QLx™
應(yīng)用： 銅電纜模塊
電源電壓： 1.1 V ~ 1.3 V
封裝/外殼： 46-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 46-TQFN
包裝： 標(biāo)準(zhǔn)包裝
安裝類型： 表面貼裝
其它名稱： QLX4600SIQT7-DKR
QLX4600SIQT7-DKR-ND
QLX4600SIQT7DKR
12
FN6979.1
November 19, 2009
Operation
The QLx4600-S30 is an advanced quad lane-extender for
high-speed interconnects. A functional diagram of one of
the four channels in the QLx4600-S30 is shown in
Figure 22. In addition to a robust equalization filter to
compensate for channel loss and restore signal fidelity,
the QLx4600-S30 contains unique integrated features to
preserve special signaling protocols typically broken by
other equalizers. The signal detect function is used to
mute the channel output when the equalized signal falls
below the level determined by the Detection Threshold
(DT) pin voltage. This function is intended to preserve
periods of line silence (“quiescent state” in InfiniBand
contexts).
As illustrated in Figure 22, the core of each high-speed
signal path in the QLx4600-S30 is a sophisticated
equalizer followed by a limiting amplifier. The equalizer
compensates for skin loss, dielectric loss, and impedance
discontinuities in the transmission channel. Each
equalizer is followed by a limiting amplification stage that
provides a clean output signal with full amplitude swing
and fast rise-fall times for reliable signal decoding in a
subsequent receiver.
Individually Adjustable Equalization Boost
Each channel in the QLx4600-S30 features an
independently settable equalizer for custom signal
restoration. Each equalizer can be set to one of 32 levels
of compensation when the serial bus is used to program
the boost level and one of 18 compensation levels when
the CP[k] pins are used to set the level. The equalizer
transfer functions for a subset of these compensation
levels are plotted in Figure 23. The flexibility of this
adjustable compensation architecture enables signal
fidelity to be optimized on a channel-by-channel basis,
providing support for a wide variety of channel
characteristics and data rates ranging from 2.5 to 6.25
Gb/s. Because the boost level is externally set rather
than internally adapted, the QLx4600-S30 provides
reliable communication from the very first bit
transmitted. There is no time needed for adaptation and
control loop convergence. Furthermore, there are no
pathological data patterns that will cause the
QLx4600-S30 to move to an incorrect boost level.
The “Applications Information” section beginning on
page 13 details how to set the boost level by both the
CP-pin voltage approach and the serial programming
approach.
CML Input and Output Buffers
The input and output buffers for the high-speed data
channels in the QLx4600-S30 are implemented using
CML. Equivalent input and output circuits are shown in
Figures 24 and 25, respectively.
Adjustable
Equalizer
Signal
Detector
-
+
Detection
Threshold
LOS[k]
OUT[k] [P,N]
Limiting
Amplifier
IN[k] [P,N]
EQ Setting
(CP[k] / DI)
FIGURE 22. FUNCTIONAL DIAGRAM OF A SINGLE CHANNEL WITHIN THE QLx4600-S30
FIGURE 23. EQUALIZER TRANSFER FUNCTIONS FOR
SETTINGS 0, 5, 10, 15, 20, 25, AND 31 IN
THE QLx4600-S30
QLx4600-S30
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參數(shù)描述
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