參數(shù)資料
型號: R5F562N7ADFP#V0
廠商: Renesas Electronics America
文件頁數(shù): 4/148頁
文件大小: 0K
描述: MCU 32BIT FLASH 384KROM 100LQFP
產(chǎn)品培訓模塊: RX Compare Match Timer
RX DMAC
標準包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: EBI/EMI,I²C,SCI,SPI,USB
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 72
程序存儲器容量: 384KB(384K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x10/12b,D/A 1x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
2004 Microchip Technology Inc.
DS39609B-page 99
PIC18F6520/8520/6620/8620/6720/8720
REGISTER 9-11:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
U-0
R/W-1
U-0
R/W-1
—CMIP
EEIP
BCLIP
LVDIP
TMR3IP
CCP2IP
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6
CMIP: Comparator Interrupt Priority bit
1
= High priority
0
= Low priority
bit 5
Unimplemented: Read as ‘0’
bit 4
EEIP: Data EEPROM/Flash Write Operation Interrupt Priority bit
1
= High priority
0
= Low priority
bit 3
BCLIP: Bus Collision Interrupt Priority bit
1
= High priority
0
= Low priority
bit 2
LVDIP: Low-Voltage Detect Interrupt Priority bit
1
= High priority
0
= Low priority
bit 1
TMR3IP: TMR3 Overflow Interrupt Priority bit
1
= High priority
0
= Low priority
bit 0
CCP2IP: CCP2 Interrupt Priority bit
1
= High priority
0
= Low priority
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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