參數(shù)資料
型號： R5F562N8ADBG#U0
廠商： Renesas Electronics America
文件頁數(shù)： 143/148頁
文件大?。?/td> 0K
描述： MCU 32BIT FLASH 512KROM 176LFBGA
產(chǎn)品培訓模塊： RX Compare Match Timer
RX DMAC
標準包裝： 1
系列： RX600
核心處理器： RX
芯體尺寸： 32-位
速度： 100MHz
連通性： EBI/EMI，I²C，SCI，SPI，USB
外圍設備： DMA，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 126
程序存儲器容量： 512KB（512K x 8）
程序存儲器類型： 閃存
RAM 容量： 96K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10/12b，D/A 2x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 176-LFBGA
包裝： 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 92
2004 Microchip Technology Inc.
9.2
PIR Registers
The PIR registers contain the individual flag bits for the
peripheral interrupts. Due to the number of peripheral
interrupt sources, there are three Peripheral Interrupt
Flag Registers (PIR1, PIR2 and PIR3).
REGISTER 9-4:
PIR1: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 1
Note 1: Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
2: User software should ensure the appropri-
ate interrupt flag bits are cleared prior to
enabling an interrupt and after servicing
that interrupt.
R/W-0
R-0
R/W-0
PSPIF(1)
ADIF
RC1IF
TX1IF
SSPIF
CCP1IF
TMR2IF
TMR1IF
bit 7
bit 0
bit 7
PSPIF: Parallel Slave Port Read/Write Interrupt Flag bit(1)
1
= A read or a write operation has taken place (must be cleared in software)
0
= No read or write has occurred
bit 6
ADIF: A/D Converter Interrupt Flag bit
1
= An A/D conversion completed (must be cleared in software)
0
= The A/D conversion is not complete
bit 5
RC1IF: USART1 Receive Interrupt Flag bit
1
= The USART1 receive buffer, RCREG, is full (cleared when RCREG is read)
0
= The USART1 receive buffer is empty
bit 4
TX1IF: USART Transmit Interrupt Flag bit
1
= The USART1 transmit buffer, TXREG, is empty (cleared when TXREG is written)
0
= The USART1 transmit buffer is full
bit 3
SSPIF: Master Synchronous Serial Port Interrupt Flag bit
1
= The transmission/reception is complete (must be cleared in software)
0
= Waiting to transmit/receive
bit 2
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1
= A TMR1 register capture occurred (must be cleared in software)
0
= No TMR1 register capture occurred
Compare mode:
1
= A TMR1 register compare match occurred (must be cleared in software)
0
= No TMR1 register compare match occurred
PWM mode:
Unused in this mode.
bit 1
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1
= TMR2 to PR2 match occurred (must be cleared in software)
0
= No TMR2 to PR2 match occurred
bit 0
TMR1IF: TMR1 Overflow Interrupt Flag bit
1
= TMR1 register overflowed (must be cleared in software)
0
= TMR1 register did not overflow
Note 1: Enabled only in Microcontroller mode for PIC18F8X20 devices.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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