參數資料
型號: R5F562N8ADBG#U0
廠商: Renesas Electronics America
文件頁數: 81/148頁
文件大?。?/td> 0K
描述: MCU 32BIT FLASH 512KROM 176LFBGA
產品培訓模塊: RX Compare Match Timer
RX DMAC
標準包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: EBI/EMI,I²C,SCI,SPI,USB
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數: 126
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數據轉換器: A/D 8x10/12b,D/A 2x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 176-LFBGA
包裝: 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 36
2004 Microchip Technology Inc.
PORTJ
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
PORTH
PIC18F6X20 PIC18F8X20
0000 xxxx
0000 uuuu
uuuu uuuu
PORTG
PIC18F6X20 PIC18F8X20
---x xxxx
uuuu uuuu
---u uuuu
PORTF
PIC18F6X20 PIC18F8X20
x000 0000
u000 0000
PORTE
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
PORTD
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
PORTC
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
PORTB
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
PORTA(5,6)
PIC18F6X20 PIC18F8X20
-x0x 0000(5)
-u0u 0000(5)
-uuu uuuu(5)
TMR4
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
PR4
PIC18F6X20 PIC18F8X20
1111 1111
uuuu uuuu
T4CON
PIC18F6X20 PIC18F8X20
-000 0000
-uuu uuuu
CCPR4H
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCPR4L
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCP4CON
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
CCPR5H
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCPR5L
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCP5CON
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
SPBRG2
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
RCREG2
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
TXREG2
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
TXSTA2
PIC18F6X20 PIC18F8X20
0000 -010
uuuu -uuu
RCSTA2
PIC18F6X20 PIC18F8X20
0000 000x
uuuu uuuu
TABLE 3-3:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET
Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4:
See Table 3-2 for Reset value for specific condition.
5:
Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
oscillator modes, they are disabled and read ‘0’.
6:
Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read ‘0’.
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