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參數(shù)資料
| 型號(hào)： | RF133 |
| 英文描述： | RF/IF Transceiver For GSM Applications |
| 中文描述： | 射頻/中頻收發(fā)器的GSM應(yīng)用 |
| 文件頁(yè)數(shù)： | 5/17頁(yè) |
| 文件大?。?/td> | 123K |
| 代理商： | RF133 |
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RF/IF Transceiver
RF133
100776A
Conexant
5
Proprietary Information and Specifications are Subject to Change
October 8, 1999
T1
Rx slot
RXENA
T/H
Front-end
enable
(external to RF133)
TDMA slots
T2
T3
T4
C064
Figure 4. RF133 Sample and Hold Timing Diagram
Table 2. Mnimum Required DC Offset Calibration Time T2 and Droop Rate
Hold Capacitor (CTH1, CTH2)
22 nF
120 nF
Cold start
60 μsec
350 μs
Frame-to-frame
10 μsec
60 μs
Typical droop-rate (@ I/Q outputs)
1 mV/msec
0.17 mV/ms
Because of on-chip loading currents, the hold capacitors (CTH1
and CTH2) slowly discharge causing the I and Q DC offset
voltages to droop if the RF133 remains uncalibrated for an
extended period of time (the droop rate versus the hold
capacitor is also shown in Table 2).
To rectify this voltage droop, it is recommended that
recalibration occur before every receive slot (i.e., every 4.6 ms
for GSM).
Internal Voltage Controlled Oscillator (VCO) and Frequency
Dividers
. The differential VCO output is buffered and then fed to
three frequency dividers (Rx, Tx, PLL) with a selectable divide
ratio of either 2 or 4. The Rx and Tx dividers are both
quadrature dividers, which generate in-phase and quadrature
LOs. The buffered PLL divider output can be used to drive an
external PLL IC. The resonant element of the VCO is connected
to pins 28 (RES1) and 29 (RES2). Figure 5 shows the VCO
configuration.
Transmit Path_______________________________________
The transmt path consists of the following functional blocks:
An I/Q modulator with IF output amplifier.
A translation loop circuit consisting of a phase/frequency
detector, a charge pump, a Tx RF input buffer, an LO input
buffer, a mxer, two dividers, and a low pass filter.
The inputs to the I/Q modulator are differential I and Q
baseband signals which are low-pass filtered and then applied
to a pair of double balanced mxers (see Figure 2). The outputs
of the mxers are combined to produce a modulated signal
which is then filtered externally and input through pins 6 and 7
(TXIFIN+ and TXIFIN-) to the reference divider in the translation
loop.
The translation loop circuit together with the external transmt
VCO, external LO, and loop filter, forma PLL with a mxer in the
feedback loop. This PLL upconverts the modulated IF signal to
the transmt frequency which then drives the final power
amplifier. Since inherent bandpass filtering occurs in the PLL,
the need for a post PA duplexer is removed. This is the major
advantage a translation loop approach has over the
conventional upconversion scheme. The elimnation of this
duplexer reduces the loss in the transmt path which in turn
reduces the output level of the final power amplifier and,
therefore, reduces the current consumption. Immediate benefits
of this approach are increased handset talk time and standby
time, and less component count.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| RF1334-000 | 功能描述:可復(fù)位保險(xiǎn)絲 60V .14A-HD 10A MAX (R) RoHS:否 制造商:Bourns 電流額定值: 電阻:7.5 Ohms 最大直流電壓: 保持電流:0.1 A 安裝風(fēng)格:SMD/SMT 端接類型:SMD/SMT 跳閘電流:0.6 A 引線間隔: 系列:MF-PSHT 工作溫度范圍:- 40 C to + 125 C |
| RF1335-000 | 功能描述:可復(fù)位保險(xiǎn)絲 30V .2A-HD 10A MAX (R) RoHS:否 制造商:Bourns 電流額定值: 電阻:7.5 Ohms 最大直流電壓: 保持電流:0.1 A 安裝風(fēng)格:SMD/SMT 端接類型:SMD/SMT 跳閘電流:0.6 A 引線間隔: 系列:MF-PSHT 工作溫度范圍:- 40 C to + 125 C |
| RF1336-000 | 功能描述:可復(fù)位保險(xiǎn)絲 12V 1.5A-HD 100A MAX (R) RoHS:否 制造商:Bourns 電流額定值: 電阻:7.5 Ohms 最大直流電壓: 保持電流:0.1 A 安裝風(fēng)格:SMD/SMT 端接類型:SMD/SMT 跳閘電流:0.6 A 引線間隔: 系列:MF-PSHT 工作溫度范圍:- 40 C to + 125 C |
| RF1336B | 制造商:RFM 制造商全稱:RF Monolithics, Inc 功能描述:868.35 MHz SAW Filter |
| RF1336C | 制造商:RFM 制造商全稱:RF Monolithics, Inc 功能描述:868.35 MHz SAW Filter |
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