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參數(shù)資料
| 型號(hào)： | RF2968 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | BLUETOOTHTM TRANSCEIVER |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, LCC-32 |
| 文件頁(yè)數(shù)： | 17/20頁(yè) |
| 文件大?。?/td> | 150K |
| 代理商： | RF2968 |
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Preliminary
11-133
RF2968
Rev A13 010912
11
T
PLL[6:0]:
These bits determine the local oscillator (LO) frequency (i.e., the frequency at the doubler output) for both RX and TX
modes. The LO frequency is set 1MHz above the channel center frequency. The PLL [6:0] data bits represent the fre-
quency offset (F
OFFSET
) in MHz from a base frequency of 2400MHz. For the normal
Bluetooth
frequency range of
2402MHz to 2480MHz, F
OFFSET
will range from 3 to 81; for the optional extended
Bluetooth
range (up to 2497MHz),
F
OFFSET
will range from 3 to 98 (high-side injection assumed in both cases).
Example:
Assume a channel frequency of 2448MHz.
The LO frequency is then: 2448+1=2449MHz,
and F
OFFSET
is: 2449-2400=49.
PLL [6:0] is then:0110001
Register 30 - Manufacturer’s ID Code LSB’s (Read-Only)
Register 31 - Manufacturer’s ID Code MSB’s (Read-Only)
Bidirectional Interface
Data Exchange and Timing
All bidirectional timing may be derived from
BRCLK
, which is generated by the RF2968. The RF2968 uses the falling
edges of
BRCLK
, and the baseband uses the rising edges. Figure 4 shows the general timing for the case of data being
transferred from the RF2968 to the baseband.
State Machine Control
The chip control circuitry of the RF2968 places the device into the required transmit, receive or power saving mode by
controlling the power down and reset states of all other circuits in the device. The chip control inputs come from the
baseband device (
BnPWR
,
BXTLEN
,
BPKTCTL
,
BDATA1
) via the bidirectional interface and from the registers at the
output of the DBus block (
RXEN
,
TXEN
). State machines in the baseband and the RF2968 maintain the state which con-
trols the direction of the bidirectional lines. The baseband controls the state machine in the RF2968 and ensures that
data contentions do not occur during reset and normal operation. The control of individual sections of the RF2968 in
each state is as follows.
Bit Number
Bit Name
Comments
0 - 15
ID_Code [15:0]
Lower 16 bits of manufacturer’s code. The fixed “1” LSB of the manufacturer
code is read at bit 0.
Bit Number
Bit Name
Comments
0 - 15
ID_Code [31:16]
Upper 16 bits of manufacturer’s code. The MSB of the version number is
read at bit 15. The RF2968 code is hex10B9825D.
BRCLK
BB Data
Sampling
Points
BDATA1
Figure 4. General Bidirectional Timing (RF2968 writing to baseband)
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