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參數(shù)資料
| 型號： | RF2968 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | BLUETOOTHTM TRANSCEIVER |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, LCC-32 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 150K |
| 代理商： | RF2968 |
Preliminary
11-124
RF2968
Rev A13 010912
11
T
T heory of Operation
The RF2968 is the first in a family of 2.4GHz transceivers developed specifically for
Bluetooth
applications. It operates
as a Power Class 2 (+4dBm) or Class 3 (0dBm)
Bluetooth
device and is fully compliant to Version 1.0b of the
Bluetooth
Radio Specification. For Power Class 1 (+20dBm) applications, the RF2968 may be used with a power amplifier such as
the RF2172. Processed in 0.35um silicon Bi-CMOS and packaged in a 5mm-square, industry-standard 32-pin leadless
plastic package, the RF2968 provides high performance at a very low cost. With integrated IF filtering, the RF2968
requires minimal external components and eliminates the need for costly components such as IF SAW filters and baluns.
The high impedance 'off' states of the receiver input and transmitter output also eliminate the need for an external trans-
mit/receive (T/R) switch. A complete
Bluetooth
solution may be implemented with the RF2968 in conjunction with an
antenna, RF bandpass filter, and baseband controller. In addition to the RF signal processing, the RF2968 also performs
the baseband functions of data demodulation, DC compensation, and data and clock recovery while access code corre-
lation takes place in the baseband device.
The RF2968 transmitter output is internally matched to 50
, and requires an AC-coupling capacitor. The receiver's low
noise amplifier (LNA) input (
RXIN
pin) is internally matched to present a 50
impedance to the front end filter. A single
front end filter may be shared by the transmitter and receiver by simply connecting the
TXOUT
coupling capacitor to
RXIN
. Alternatively, the transmit path may be externally amplified to +20dBm, which, in conjunction with the RF2968’s
transmit gain control and received signal strength indicator (RSSI), allows
Bluetooth
-compliant operation for Power Class
1. The RSSI data is accessed via the serial port and provides a 1dB resolution over the RX input power range of -20to-
80dBm. Transmit gain control is adjustable in 4dB steps and is also set via the serial port.
Baseband data is sent to the transmitter via the
BDATA1
pin, which is a bidirectional pin, acting as an input in transmit
mode and an output in receive mode. The RF2968 performs the Gaussian filtering of the baseband data, FSK-modulates
the IF current controlled oscillator (ICO), and upconverts the IF to the RF channel frequency.
The on-chip voltage controlled oscillator (VCO) is frequency synthesized to one half of the required local oscillator (LO)
frequency and then doubled to produce the correct LO frequency. Two external tank inductors between
RESNTR+
and
RESNTR-
set the tuning range of the VCO. Voltage is supplied to the VCO from an on-chip regulator that is connected to
the midpoint of the two tank inductors through a filtering network. Due to the fast frequency hopping requirements of
Bluetooth
, the loop filter components (connected to pins
D0
and
RSHUNT
) are especially critical as they largely deter-
mine the hopping and settling time of the VCO. Use of the component values as given in the Application Schematic is
strongly recommended.
The RF2968 may use either a 10MHz, 11MHz, 12MHz, 13MHz, or 20MHz reference clock frequency and can also sup-
port a reference clock at double these frequencies to provide a migration path toward smaller end-product designs. This
clock may be supplied by an external reference applied directly to
OSC I
through a DC-blocking capacitor. If an external
reference is not available, then a crystal and two capacitors may be used to complete the reference oscillator circuitry
contained on-chip. For either an externally or internally generated referenced frequency, a resistor between
OSC I
and
OSC O
is required for proper biasing. The frequency tolerance of the reference clock must be 20ppm or better to assure
that the maximum allowed system frequency error remains within the demodulation bandwidth of the RF2968. A select-
able 3.2kHz or 32kHz low power mode clock is available at the
LPO
pin to supply the baseband device with a low fre-
quency clock in sleep mode. Where minimal sleep mode power consumption is a concern and reference clock frequency
selection is flexible, a 12MHz reference clock should be chosen.
The receiver uses a low-IF architecture to minimize external component count. The RF signal is downconverted to
1MHz, allowing IF filtering to be incorporated on chip. Demodulated data is output at the
BDATA1
pin. Further data pro-
cessing is performed by the data and clock recovery circuitry, which utilizes a baseband PLL. Pin
D1
is the loop filter con-
nection for the baseband PLL. The synchronized data and clock are output at pins
RECDATA
and
RECCLK
. If the
baseband device used with the RF2968 performs the clock recovery, then the
D1
loop filter components may be omitted.
The interface between the RF2968 and baseband device is described in the 'Application Information' section of the full-
length datasheet available from the RFMD web site (www.rfmd.com).
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