參數(shù)資料
型號(hào)： RH80532NC021256
元件分類(lèi)： 微處理器
英文描述： Microprocessor
中文描述： 微處理器
文件頁(yè)數(shù)： 23/93頁(yè)
文件大小： 2353K
代理商： RH80532NC021256
Mobile Intel
Pentium
4 Processor-M
250686-002
Datasheet
23
NOTES:
1. Unless otherwise noted, all specifications in this table are based on latest post-silicon measurements
available at the time of publication.
2. These voltages are targets only. A variable voltage source should exist on systems in the event that a
different voltage is required. See
Section 2.4
and
Table 2
for more information. The VID bits will set the typical
V
with the minimum being defined according to current consumption at that voltage.
3. The voltage specification requirements are measured at the system board socket ball with a 100 MHz
bandwidth oscilloscope, 1.5-pF maximum probe capacitance, and 1 M
minimum impedance. The maximum
length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not
coupled in the scope probe.
4. Refer to
Table 7
through
Table 10
and
Figure 4
through
Figure 6
for the minimum, typical, and maximum V
CC
(measured at the system board socket ball) allowed for a given current. The processor should not be
subjected to any V
and I
combination wherein V
exceeds V
for a given current. Failure to
adhere to this specification can affect the long term reliability of the processor.
5. V
is defined at I
.
6. The current specified is also for AutoHALT State.
7. Typical V
CC
indicates the VID encoded voltage. Voltage supplied must conform to the load line specification
shown in
through
Table 10
.
8. The maximum instantaneous current the processor will draw while the thermal control circuit is active as
indicated by the assertion of PROCHOT# is the same as the maximum I
CC
for the processor.
9. Maximum specifications for I
Core, I
Stop-Grant, I
Sleep, and I
CC
CC
Static Max. derived from the tolerances in
Table 7
through
Table 10
, T
J
loading conditions.
10.The specification is defined per PLL pin.
11.The voltage response to a processor current load step (transient) must stay within the Transient Voltage
Tolerance Window. The voltage surge or droop response measured in this window is typically on the order of
several hundred nanoseconds to several microseconds. The Transient Voltage Tolerance Window is defined
as follows:
Case a) Load Current Step Up: e.g., from Icc = I_leakage to Icc = Icc_max. Allowable Vcc_min is defined as
minimum transient voltage at Icc = Icc_max for a period of time lasting several hundred nanoseconds to
several microseconds after the transient event.
Table 6. Voltage and Current Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
1
V
CC
V
for core logic
Maximum Performance Mode
Battery Optimized Mode
1.3
1.2
V
2, 3, 4,
5, 7, 8,11
VCCVID
VID supply voltage
-5%
1.2
+10%
V
2, 12
V
CCDPRSLP
Transient Deeper Sleep voltage
0.91
1.00
1.09
V
2
V
CCDPRSLP,DC
Static Deeper Sleep voltage
0.95
1.00
1.05
V
2
I
CC
Current for V
at core frequency
1.80 GHz & 1.3 V
1.70 GHz & 1.3 V
1.60 GHz & 1.3 V
1.50 GHz & 1.3 V
1.40 GHz & 1.3 V
31.0
29.9
28.7
27.5
26.3
A
4, 5, 8, 9
I
VCCVID
Current for VID supply
300
mA
I
SG
NT
, I
SLP
I
Stop-Grant and I
CC
Sleep at
1.3 V
1.2 V
10.1
8.9
A
6, 9
I
DSLP
I
CC
Deep Sleep at
1.3 V
1.2 V
9.0
8.3
A
9
I
DPRSLP
I
CC
Deeper Sleep at 1.0V
6.9
A
I
TCC
I
CC
TCC active
I
CC
A
8
I
CC PLL
I
CC
for PLL pins
60
mA
10
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