參數(shù)資料
型號： RHF1401KSO-01V
廠商： STMICROELECTRONICS
元件分類： ADC
英文描述： 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO48
封裝： HERMETIC SEALED, SOP-48
文件頁數(shù)： 17/34頁
文件大?。?/td> 1474K
代理商： RHF1401KSO-01V
Electrical characteristics (after 300 kRad)
RHF1401
24/34
Doc ID 13317 Rev 5
7.3
Reference connection
7.3.1
Internal reference
In the standard configuration, the ADC is biased with the internal reference voltage. The
VREFM pin is connected to the analog ground while VREFP is internally set to a voltage close
to 1.0 V. VREFP should be decoupled so as to minimize low and high frequency noise. Like
VREFP, INCN is internal and can be fixed externally. Figure 48 shows the schematic.
Figure 48.
Internal reference setting
7.3.2
External reference
An external reference voltage can be used for specific applications requiring even better
linearity or enhanced temperature behavior (see Table 6: Internal reference voltage on
page 11). An external voltage reference with the configuration shown in Figure 49 and
Figure 50 can be used to obtain optimum performance. Decoupling is achieved by using
ceramic capacitors, which provide optimum linearity versus frequency.
Note:
* The use of ceramic technology is preferable to ensure large bandwidth stability of the
capacitor.
AM04574
470 nF*
100 nF*
VIN
VINB
VREFM
VREFP
As close as possible
the ADC pins
*the use of a ceramic technology is
preferable for a large bandwidth
stability of the capacitor.
Figure 49.
External reference setting
Figure 50.
Example with a zener
AM04575
470 nF*
100 nF*
VIN
VINB
VREFM
VCCA
VREFP
As close as possible
the ADC pins
DC
source
AM04576
470 nF*
100 nF*
VIN
VINB
VREFM
VCCA
VREFP
R
As close as possible
the ADC pins
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