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參數(shù)資料
| 型號： | RHF1401KSO-01V |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | ADC |
| 英文描述： | 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO48 |
| 封裝： | HERMETIC SEALED, SOP-48 |
| 文件頁數(shù)： | 4/34頁 |
| 文件大?。?/td> | 1474K |
| 代理商： | RHF1401KSO-01V |
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Electrical characteristics (after 300 kRad)
RHF1401
12/34
Doc ID 13317 Rev 5
Higher values of SNR, SINAD and ENOB can be obtained by increasing the full-scale range
Table 9.
Digital inputs and outputs
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
Clock input
CT
Clock threshold
DVCC = 2.5 V
1.25
V
CA
Square clock amplitude
(DC component = 1.25 V)
DVCC = 2.5 V
0.8
2.5
Vp-p
Digital inputs
VIL
Logic "0" voltage
VCCBE = 2.5 V
0
0.25 x
VCCBE
V
VIH
Logic "1" voltage
VCCBE = 2.5 V
0.75 x
VCCBE
V
Digital outputs
VOL
Logic "0" voltage
IOL = -10 A
0
0.25
V
VOH
Logic "1" voltage
IOH = 10 A
VCCBE
-0.25
V
IOZ
High impedance leakage
current
OEB set to VIH
-15
15
A
CL
Output load capacitance
High CLK
frequencies
15
pF
Table 10.
Dynamic characteristics
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
SFDR
Spurious free dynamic range
Fin = 15 MHz
Fs = 20 Msps
Vin at -1 dBFS
internal references
CL = 6 pF
70
91
dBFS
SNR
Signal to noise ratio
66
70
dB
THD
Total harmonic distortion
70
86
dB
SINAD
Signal to noise and distortion
ratio
65
70
dB
ENOB
Effective number of bits
10.6
11.5
bits
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