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參數(shù)資料
| 型號： | RT9641AC32 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TRIPLE LINEAR REGULATOR CONTROLLER SUPPORT |
| 中文描述： | 三重線性穩(wěn)壓器控制器支持 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 232K |
| 代理商： | RT9641AC32 |
RT9641A/B
www.richtek-ic.com.tw
10
DS9641A/B-03 March 2002
V
OUT
:
ESR
OUT
: output capacitor bank ESR
I
OUT
: output current during transition
C
OUT
: output capacitor bank capacitance
t
t
: active-to-sleep or sleep-to-active transition time
(5
μ
S typical)
output voltage drop
Since the output voltage drop is heavily dependent on
the ESR (equivalent series resistance) of the output
capacitor bank, the capacitors should be chosen to
maintain the output voltage above the lowest allowable
regulation level.
Input Capacitors Selection
The input capacitors for an RT9641A/B application
must have sufficiently low ESR so that the input
voltage does not dip excessively when energy is
transferred to the output capacitors.
Transistor Selection/Considerations
The RT9641A/B typically requires one P-channel or
PNP transistor and two N-channel power MOSFETs
and two bipolar NPN transistors.
One general requirement for selection of transistors for
all the linear regulators/switching elements is package
selection for efficient removal of heat. The power
dissipated in a linear regulator/switching element is:
P
LINEAR
= I
O
x (V
IN
– V
OUT
)
Select a package and heatsink that maintains the
junction temperature below the rating with the
maximum expected ambient temperature.
Q1
The active element on the 2.5V/3.3V (2.6V/3.43V)
V
MEM
output has different requirements for each the
two voltage settings. In 2.5V systems utilizing RDRAM
(or voltage-compatible) memory, Q1 had better to be a
bipolar NPN capable of conducting the maximum
required output current and it must have a minimum
current gain (h
fe
) of 100~150 at this current and 0.7V
V
CE
. In such systems, the 2.5V(2.6V) output is
regulated from the ATX 3.3V output while in an active
state. In 3.3V systems (SDRAM or compatible) Q1 is
suggested to use an N-channel MOSFET, then the
MOSFET serves like a switch when it is connected to
ATX3.3V during active states (S0, S1). The main
criteria for the selection of this transistor is output
voltage budgeting. The maximum R
DS(ON)
allowed at
highest junction temperature can be expressed with
the following equation:
R
DS(ON)
MAX
= (V
IN MIN
V
OUT MIN
)/ I
OUT MAX
, where
V
IN MIN
: minimum input voltage
V
OUT
MIN
: minimum output voltage allowed.
I
OUT
MAX
: maximum output current
The gate bias available for this MOEFET is
approximately 6V, so the logic level MOSFET is
prefered. The 3.3V(3.43V) V
MEM
power also can be
regulated from ATX 5V in order to have high quality
V
MEM
, in such a configuration, either MOSFET or NPN
transistors can be used. While the heat dissipation
should be carefully handled.
Q4
If a P-chanel MOSFET is used to switch the 5VSB
output of the ATX supply into the 5V
DUAL
output during
S3 and S4/S5 states (as dictated by EN5VDL status),
then, similar to the situation where Q1 is a MOSFET,
the selection criteria of this device is also proper
voltage budgeting. The maximum r
DS (ON)
,
however,
has to be achieved with only 4.5V of V
GS
, so a logic
level MOSFET needs to be selected. If a PNP device
is chosen to perform this function, it has to have a low
saturation voltage while providing the maximum sleep-
state current and have current gain sufficiently high to
be saturated using the minimum drive current (typically
20mA). A 100
Ω
~200
Ω
resistor is recommended to be
inserted between the 5VDLSB pin and Base node of
the PNP transistor for limiting the base current.
Q3, Q5
The two N-channel MOSFETs are used to switch the
3.3V and 5V inputs provided by the ATX supply into the
3.3V
DUAL
and 5V
DUAL
outputs, respectively, while in
active (S0, S1) state. Similar R
DS(ON)
criteria apply in
these cases as well, unlike the PMOS, however, these
NMOS transistors get the benefit of an increased V
GS
drive (approximately 8V and 7V respectively).
Q2
The NPN transistor used as sleep-state pass element
on the 3.3V
DUAL
output must have a minimum current
gain of 100 at V
CE
= 1.5V and I
CE
= 500mA throughout
the in-circuit operating temperature range.
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