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參數(shù)資料
| 型號： | RT9641AC32 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TRIPLE LINEAR REGULATOR CONTROLLER SUPPORT |
| 中文描述： | 三重線性穩(wěn)壓器控制器支持 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 232K |
| 代理商： | RT9641AC32 |
RT9641A/B
DS9641A/B-03 March 2002
www.richtek-ic.com.tw
7
12V (Pin 14)
Connect this pin to the ATX (or equivalent) 12V
output. This pin is used to monitor the status of the
power supply as well as provide bias for the NMOS-
compatible output drivers. 12V presence at the chip
in the absence of bias voltage, or severe 12V
brownout during active states (S0, S1) operation can
lead to chip misbehavior. RT9641A/B refuses
entering active state before 12V power ready.
DRV2 (Pin 15)
For the 2.5V RDRAM systems, connect this pin to the
base of a suitable NPN transistor. This pass
transistor regulates the 2.5V(2.6V) output from the
ATX 3.3V during active states operation. For 3.3V
SDRAM systems connect this pin to the gate of a
suitable N-MOS transistor or the base of a suitable
NPN transistor.
VSEN2 (Pin 16)
Connect this pin to the memory output (V
OUT2
). In
sleep states, this pin is regulated to 2.5V(2.6V) or
3.3V(3.43V) (based on R
SEL
) through an internal
pass transistor capable of delivering 300mA
(Typically). The active-state voltage at this pin is
regulated through an external NPN or NMOS
transistor connected at the DRV2 pin for both
2.5V(2.6V) and 3.3V(3.43V) setting. During all
operating states, the voltage at this pin is monitored
for under-voltage events.
Description
Operation
The RT9641A/B controls 3 output voltages. It is
designed for microprocessor computer applications
with 3.3V, 5V, 5VSB, and 12V outputs from an ATX
power supply. The IC is composed of two linear
controllers supplying the PCI slots' 3.3V
AUX
power
(3.3V
DUAL
, V
OUT1
) and the 2.5V RDRAM or 3.3V
SDRAM memory power (2.5V/3.3V(2.6V/3.43V) V
MEM
,
V
OUT2
), and a dual switch controller supplying the
5V
DUAL
voltage (V
OUT3
). In addition, all the control and
monitoring functions necessary for complete ACPI
implementation are integrated into the RT9641A/B.
Initialization
The RT9641A/B automatically initializes upon receipt
of input power. The Power-On Reset (POR) function
continually monitors the 5VSB input supply voltage,
initiating soft-start operation after it exceeds its POR
threshold (in S4/S5 states). The 5VSB POR trip event
is also used to lock in the memory voltage setting
based on R
SEL
.
The RT9641A/B forces the operation mode to start
from S4/S5 states at POR releasing.
Operational Truth Tables
The EN3VDL and EN5VDL pins offer a host of choices
in terms of the overall system architecture and
supported features. Tables 1~3 describe the truth
combinations pertaining to each of the three outputs.
Table 1. 3.3V
DUAL
Output (V
OUT1
) Truth Table
EN3VDL
S5
S3 3V3D
Comments
0
1
1
3.3V
S0, S1 States (Active)
0
1
0
3.3V
S3
0
0
1
Note
Maintains Previous State
0
0
0
3.3V
S4/S5
1
1
1
3.3V
S0, S1 States (Active)
1
1
0
3.3V
S3
1
0
1
Note
Maintains Previous State
1
0
0
0V
S4/S5
Note: Combination not allowed.
As seen in Table 1, EN3VDL simply controls whether
the 3.3V
DUAL
plane remains powered up during S4/S5
sleep state.
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