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參數(shù)資料
| 型號： | RTC4573 |
| 廠商： | 愛普生（中國）有限公司 |
| 英文描述： | Serial RTC with Alarm and Timer |
| 中文描述： | 串行實(shí)時(shí)時(shí)鐘與鬧鐘和定時(shí)器 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 157K |
| 代理商： | RTC4573 |
Page-2
Aug.1998
n
Pin Connection
2.
3
4
5
6
7.
8.
1.
9
GND
DD
V
FOUT
CE0
N.C
CE1
N.C
N.C
#1
#9
#10
#18
17
16
15
14
13
12
11.
18
10
CLK
N.C
DATA
N.C
/ AIRQ
/ TIRQ
N.C
N.C
N.C
N.C
Symbol
Pin-No.
I / O
Function
CE1
5
Input
Chip enable 1 input pin.
This terminal has pull-down resistor built-in. Access to this RTC is possible in
"H" level both CE0,CE1 terminal. FOUT terminal can output frequency when
inputs "H" level into this terminal regardless of state of CE0 terminal. FOUT
terminal is high impedance state in input "L" level.
This I/O pin is used to for setting write mode/read mode, for writing an
address, and for reading and writing data. This pin functions either as an
input pin or an output pin, according to the write mode/read mode setting
made in the first 8 bits of input data following the rising edge of the CE input.
Shift clock input pin. In write mode, the data is read from the DATA pin at
the rising edge of the CLK signal; in read mode, the data is output from the
DATA pin at the rising edge of the CLK signal.
Connect to the negative (ground) line of the power supply.
DATA
6
Bi-
directional
CLK
7
Input
GND
9
-
/ TIRQ
10
Output
Open drain interrupt output pin for the interval timer.
/ AIRQ
11
Output
Output Open drain interrupt output pin for alarms.
CE0
12
Input
Chip enable 0 input pin.
When high, access to the internal registers is enabled. While low, the
DATA pin goes to high impedance. When the CE pin is set low, the fr, TEST,
and RESET bits are forcibly cleared to "0".Set this pin low when turning the
power on, when the device is not to be accessed, and when using the
backup power supply. This pin does not affect FOUT terminal.
Frequency output terminal. Frequency is selectable by software.
FOUT
13
Output
V
DD
14
-
Connect to the positive line of the power supply.
Access is possible between 1.6 and 5.5V
N.C.
1,2,3,
4,8,
15,16,
17,18
Although these pins are not connected internally, they should always be left
open in order to obtain the most stable oscillation possible.
* Always connect a passthrough capacitor of at least 0.1
m
F as close as possible between V
DD
and GND.
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