參數(shù)資料
型號(hào)： RTL8139
廠商： Electronic Theatre Controls, Inc.
英文描述： REALTEK 3.3V SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
中文描述： 瑞昱3.3V的單芯片快速以太網(wǎng)控制器電源管理
文件頁(yè)數(shù)： 44/62頁(yè)
文件大?。?/td> 648K
代理商： RTL8139
RTL8139C(L)
2002/01/10
Rev.1.4
44
then PCI PMC = C2 F7.
If Aux. power is absent, then PMC in PCI config space is the same as 9346 PMC except the above 4 bits
are all 0’s. I.e. if 9346 PMC = C2 F7, the PCI PMC = 02 76.
In this case, if wakeup support is desired when the main power is off, it is suggested that the 9346
PMC be set to: C2 F7 (RT 9346 default value). It is not recommended to set the D0_support_PME
bit to “1”.
If 9346 D3c_support_PME = 0,
If Aux. power exists, then PMC in PCI config space is the same as 9346 PMC. I.e. if 9346 PMC = C2 77,
then PCI PMC = C2 77.
If Aux. power is absent, then PMC in PCI config space is the same as 9346 PMC except the above 4 bits
are all 0’s. I.e. if 9346 PMC = C2 77, the PCI PMC = 02 76.
In this case, if wakeup support is not desired when the main power is off, it is suggested that the
9346 PMC to be 02 76. It is not recommended to set the D0_support_PME bit to “1”.
A Link Wakeup occurs only when the following conditions are met:
2.
The LinkUp bit (CONFIG3#4) is set to 1, the PMEn bit (CONFIG1#0) is set to 1, and the RTL8139C(L) is in an
isolation state, or the PME# can be asserted in current power state.
The Link status is re-established.
A Magic Packet Wakeup occurs only when the following conditions are met:
The destination address of the received Magic Packet matches.
The received Magic Packet does not contain a CRC error.
The Magic bit (CONFIG3#5) is set to 1, the PMEn bit (CONFIG1#0) is set to 1, and the RTL8139C(L) is in isolation
state, or the PME# can be asserted in current power state.
The Magic Packet pattern matches, i.e. 6 * FFh + MISC(can be none)+ 16 * DID(Destination ID) in any part of a valid
(Fast) Ethernet packet.
A Wakeup Frame event occurs only when the following conditions are met:
The destination address of the received Wakeup Frame matches.
The received Wakeup Frame does not contain a CRC error.
The PMEn bit (CONFIG1#0) is set to 1.
The 8-bit CRC
*
(or 16-bit CRC) of the received Wakeup Frame matches with the 8-bit CRC
*
(or 16-bit CRC) of the
sample Wakeup Frame pattern received from the local machine’s OS.
The
last masked byte
**
of the received Wakeup Frame matches with the last masked byte of the sample Wakeup Frame
pattern provided by the local machine’s OS. (In Long Wakeup Frame mode, the last masked byte field is replaced with
the high byte of the 16-bit CRC.)
* 8-bit CRC:
This 8-bit CRC logic is used to generate an 8-bit CRC from the masked bytes of the received Wakeup Frame packet within offset
12 to 75. Software should calculate the 8-bit Power Management CRC for each specific sample wakeup frame and store the
calculated CRC in the corresponding CRC register for the RTL8139C(L) to check if there is a Wakeup Frame packet coming in.
* 16-bit CRC: (Long Wakeup Frame mode, the mask bytes cover from offset 0 to 127):
Long Wakeup Frame:
The RTL8139C(L) also supports 3 long Wakeup Frames. If the range of the mask bytes of the sample
Wakeup Frame, passed down by the OS to the driver, exceeds the range from offset 12 to 75, the related registers of wakeup
frames 2 and 3 can be merged to support one long wakeup frame by setting the LongWF (bit0, CONFIG4). Thus, the range
of effective mask bytes extends from offset 0 to 127. The low byte and high byte of the calculated 16-bit CRC should be put
into register CRC2 and LSBCRC2 respectively. The mask bytes (16 bytes) should be stored to register Wakeup2 and
Wakeup3. The CRC3 and LSBCRC3 have no meaning in this case and should be reset to 0. The long Wakeup Frame pairs
are wakeup frames 4 and 5, wakeup frames 6 and 7. The CRC5, CRC7, LSBCRC5, and LSBCRC7 have no meaning in this
case and should be reset to 0, if the RTL8139C(L) is set to support long Wakeup Frames. In this case, the RTL8139C(L)
supports 5 wakeup frames, that are 2 normal wakeup frames and 3 long wakeup frames.
相關(guān)PDF資料
PDF描述
RTL8139A REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139B REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139D REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8201 REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL
RTL8201BL REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RTL8139A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139C_PLUS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RTL8139C_Plus Specification
RTL8139CL 制造商:Realtek Semiconductor 功能描述:
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