參數(shù)資料
型號: S12VREGV1D
廠商: Motorola, Inc.
英文描述: MC9S12DT128 Device User Guide V02.09
中文描述: MC9S12DT128設(shè)備的用戶手冊V02.09
文件頁數(shù): 29/138頁
文件大小: 2083K
代理商: S12VREGV1D
MC9S12DT128 Device User Guide — V02.09
29
Figure 1-1 MC9S12DT128 Block Diagram
128K Byte Flash EEPROM
8K Byte RAM
Enhanced Capture
Timer
RESET
EXTAL
XTAL
V
DD1,2
V
SS1,2
SCI0
2K Byte EEPROM
BKGD
R/W
LSTRB
ECLK
MODA
MODB
NOACC/XCLKS
XIRQ
IRQ
System
Integration
Module
(SIM)
VDDR
VSSR
VREGEN
CPU
Periodic Interrupt
COP Watchdog
Clock Monitor
Breakpoints
Single-wire Background
Debug Module
PLL
VSSPLL
XFC
VDDPLL
Multiplexed Address/Data Bus
VDDA
VSSA
VRH
VRL
ATD0
Multiplexed
Wide Bus
Multiplexed
Narrow Bus
V
DDX
V
SSX
Internal Logic 2.5V
PPAGE
V
DDPLL
V
SSPLL
PLL 2.5V
P
P
P
P
P
P
P
P
TEST
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
P
P
P
P
P
P
P
P
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
PE3
PE4
PE5
PE6
PE7
PE0
PE1
PE2
AN2
AN3
AN4
AN5
AN6
AN7
AN0
AN1
PAD03
PAD04
PAD05
PAD06
PAD07
PAD00
PAD01
PAD02
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
IOC0
IOC1
PT3
PT4
PT5
PT6
PT7
PT0
PT1
PT2
VRH
VRL
VDDA
VSSA
VDDA
VSSA
VRH
VRL
ATD1
AN2
AN3
AN4
AN5
AN6
AN7
AN0
AN1
PAD11
PAD12
PAD13
PAD14
PAD15
PAD08
PAD09
PAD10
RXD
TXD
RXD
TXD
MISO
MOSI
SCK
SS
PS3
PS4
PS5
PS6
PS7
PS0
PS1
PS2
SCI1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM0
PWM1
PP3
PP4
PP5
PP6
PP7
PP0
PP1
PP2
PIX2
PIX3
PIX4
PIX5
PIX0
PIX1
ROMCTL ECS
PK3
PK4
PK5
PK7
PK0
PK1
PK2
XADDR17
XADDR18
XADDR19
ECS ROMCTL
XADDR14
XADDR15
XADDR16
SPI0
IIC
SDA
SCL
PJ6
PJ7
CAN0
RxCAN
TxCAN
RxCAN
TxCAN
RX_BF
TX_BF
BF_PSYN
BF_PROK
BF_PERR
BF_PSLM
PM1
PM2
PM3
PM4
PM5
PM6
PM7
PM0
CAN1
KWH2
KWH3
KWH4
KWH5
KWH6
KWH7
KWH0
KWH1
PH3
PH4
PH5
PH6
PH7
PH0
PH1
PH2
KWJ0
KWJ1
KWJ6
KWJ7
PJ0
PJ1
I/O Driver 5V
V
DDA
V
SSA
A/D Converter 5V &
Voltage Regulator Reference
DDRA
DDRB
PTA
PTB
D
P
A
A
P
D
P
D
P
D
P
D
P
D
P
D
P
D
BDLC
(J1850)
RxB
TxB
Clock and
Reset
Generation
Module
Voltage Regulator
VDD1,2
VSS1,2
V
DDR
V
SSR
Voltage Regulator 5V & I/O
CAN0,4
RxCAN
TxCAN
MISO
MOSI
SCK
SS
SPI1
KWP2
KWP3
KWP4
KWP5
KWP6
KWP7
KWP0
KWP1
S
M
BYTE-
FLIGHT
S
S
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