
June 13, 2005 S29AL032D_00_A3
S29AL032D
35
Ad vance
Info rmat i o n
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector erase command sequence is initiated by writ-
ing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then
followed by the address of the sector to be erased, and the sector erase command.
Table 17 onpage 38 shows the address and data requirements for the sector erase command sequence.
The device does not require the system to preprogram the memory prior to erase. The Embedded
Erase algorithm automatically programs and verifies the sector for an all zero data pattern prior
to electrical erase. The system is not required to provide any controls or timings during these
operations.
After the command sequence is written, a sector erase time-out of 50 s begins. During the time-
out period, additional sector addresses and sector erase commands may be written. Loading the
sector erase buffer may be done in any sequence, and the number of sectors may be from one
sector to all sectors. The time between these additional cycles must be less than 50 s, otherwise
the last address and command might not be accepted, and erasure may begin. It is recommended
that processor interrupts be disabled during this time to ensure all commands are accepted. The
interrupts can be re-enabled after the last Sector Erase command is written. If the time between
additional sector erase commands can be assumed to be less than 50 s, the system need not
monitor DQ3. Any command other than Sector Erase or Erase Suspend during the time-
out period resets the device to reading array data. The system must rewrite the command
sequence and any additional sector addresses and commands.
The system can monitor DQ3 to determine if the sector erase timer has timed out. (See the
“DQ3:Sector Erase Timer” section.) The time-out begins from the rising edge of the final WE# pulse in
the command sequence.
Once the sector erase operation has begun, only the Erase Suspend command is valid. All other
commands are ignored. Note that a hardware reset during the sector erase operation immedi-
ately terminates the operation. The Sector Erase command sequence should be reinitiated once
the device has returned to reading array data, to ensure data integrity.
When the Embedded Erase algorithm is complete, the device returns to reading array data and
addresses are no longer latched. The system can determine the status of the erase operation by
status bits.)
Erase Suspend/Erase Resume Commands
The Erase Suspend command allows the system to interrupt a sector erase operation and then
read data from, or program data to, any sector not selected for erasure. This command is valid
only during the sector erase operation, including the 50 s time-out period during the sector erase
command sequence. The Erase Suspend command is ignored if written during the chip erase op-
eration or Embedded Program algorithm. Writing the Erase Suspend command during the Sector
Erase time-out immediately terminates the time-out period and suspends the erase operation.
Addresses are don’t-cares when writing the Erase Suspend command.
When the Erase Suspend command is written during a sector erase operation, the device requires
a maximum of 20 s to suspend the erase operation. However, when the Erase Suspend command
is written during the sector erase time-out, the device immediately terminates the time-out pe-
riod and suspends the erase operation.
After the erase operation has been suspended, the system can read array data from or program
data to any sector not selected for erasure. (The device erase suspends all sectors selected for
erasure.) Normal read and write timings and command definitions apply. Reading at any address