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| 型號(hào)： | S29GL128N11FAIVH0 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 16M X 16 FLASH 3V PROM, 110 ns, PBGA64 |
| 封裝： | 10 X 13 MM, 1 MM PITCH, FBGA-64 |
| 文件頁數(shù)： | 40/74頁 |
| 文件大小： | 1593K |
| 代理商： | S29GL128N11FAIVH0 |
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May 1, 2006 S29GL-N_01_A0
S29GL-N
43
Data
She e t
10.11 Password Protection Command Set Definitions
The Password Protection Command Set permits the user to program the 64-bit password, verify the
programming of the 64-bit password, and then later unlock the device by issuing the valid 64-bit password.
The Password Protection Command Set Entry command sequence must be issued prior to any of the
commands listed following to enable proper command execution.
Note that issuing the Password Protection Command Set Entry command disabled reads and writes the
main memory.
Password Program Command
Password Read Command
Password Unlock Command
The Password Program command permits programming the password that is used as part of the hardware
protection scheme. The actual password is 64-bits long. There is no special addressing order required for
programming the password. The password is programmed in 8-bit or 16-bit portions. Each portion
requires a Password Program Command.
Once the Password is written and verified, the Password Protection Mode Lock Bit in the Lock Register must
be programmed in order to prevent verification. The Password Program command is only capable of
programming 0s. Programming a 1 after a cell is programmed as a 0 results in a time-out by the Embedded
Program AlgorithmTM with the cell remaining as a 0. The password is all F’s when shipped from the factory. All
64-bit password combinations are valid as a password.
The Password Read command is used to verify the Password. The Password is verifiable only when the
Password Protection Mode Lock Bit in the Lock Register is not programmed. If the Password Protection
Mode Lock Bit in the Lock Register is programmed and the user attempts to read the Password, the device
always drives all F’s onto the DQ data bus.
The lower two address bits (A1–A0) for word mode and (A1–A-1) for by byte mode are valid during the
Password Read, Password Program, and Password Unlock commands. Writing a 1 to any other address
bits (AMAX-A2) aborts the Password Read and Password Program commands.
The Password Unlock command is used to clear the PPB Lock Bit to the unfreeze state so that the PPB bits
can be modified. The exact password must be entered in order for the unlocking function to occur. This 64-bit
Password Unlock command sequence takes at least 2 s to process each time to prevent a hacker from
running through the all 64-bit combinations in an attempt to correctly match the password. If another
password unlock is issued before the 64-bit password check execution window is completed, the command is
ignored. If the wrong address or data is given during password unlock command cycle, the device may enter
the write-to-buffer abort state. In order to exit the write-to-abort state, the write-to-buffer-abort-reset command
must be given. Otherwise the device hangs.
The Password Unlock function is accomplished by writing Password Unlock command and data to the device
to perform the clearing of the PPB Lock Bit to the unfreeze state. The password is 64 bits long. A1 and A0 are
used for matching in word mode and A1, A0, A-1 in byte mode. Writing the Password Unlock command does
not need to be address order specific. An example sequence is starting with the lower address A1-A0=00,
followed by A1-A0=01, A1-A0=10, and A1-A0=11 if the device is configured to operate in word mode.
Approximately 2 s is required for unlocking the device after the valid 64-bit password is given to the device.
It is the responsibility of the microprocessor to keep track of the entering the portions of the 64-bit password
with the Password Unlock command, the order, and when to read the PPB Lock bit to confirm successful
password unlock. In order to re-lock the device into the Password Protection Mode, the PPB Lock Bit Set
command can be re-issued.
Note: The Password Protection Command Set Exit command must be issued after the execution of the
commands listed previously to reset the device to read mode. Otherwise the device hangs.
Note: Issuing the Password Protection Command Set Exit command re-enables reads and writes for the
main memory.
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