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參數(shù)資料
| 型號(hào)： | S5D2510 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | stand-alone OSD Processor |
| 中文描述： | 獨(dú)立OSD處理器 |
| 文件頁數(shù)： | 4/32頁 |
| 文件大?。?/td> | 267K |
| 代理商： | S5D2510 |
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S5D2510
OSD PROCESSOR FOR MONITOR (PRELIMINARY)
4
PIN DESCRIPTIONS
Table 1. Pin Description
Pin No.
1
Signal
VSSA
Active
-
I/ O
-
Description
This pin provides the signal ground to the PLL circuit. We
recommend that you separate the analog ground from the digital
ground as shown in 'Figure 3 : S5D2510 Application Circuit' (6p)
for optimum performance (S5D2510's built-in PLL is sensitive to
noise due to wide range PLL characteristics).
This voltage is made in an external loop filter and sent to VCO's
input block. Operation voltage range is about 1
4V, and you
can raise immunity against external noise if you want lower the
VCO sensitivity by allowing the max operation voltage range
possible at 5V power voltage. Refer to 'PLL Control' (29p).
Connect to ground using resistance in order to make the
reference current that need to operate internal PLL (PLL region
control). Refer to 'PLL Control' (29p)'.
PLL gain controlled by controlling VCO Current.
This pin supplies +5V supply voltage to the PLL circuit. We
recommend that you divide the digital and analog power for PLL
as you did in 'Figure 3 : S5D2510 Application Circuit (6p)' to
prevent the influence of clock noise on the digital block.
Horizontal Flyback : This pin is reference signal source of the
internal PLL.
Serial Data (I
2
C). We recommend that you use the serial resistor
about 1/ 10 value of 5V pull-up resistor as I
2
C protocol.
Serial Clock (I
2
C). We recommend that you use the serial resistor
about 1/ 10 value of 5V pull-up resistor as I
2
C protocol.
Vertical Flyback signal : Similar to pin #6, this inputs the negative
polarity vertical flyback signal for syncronizing the vertical control
circuit.
Ground for Digital Part
Fast Blank Signal : OSD R/ G/ B output is recognized in the Pre-
AMP only when this output pin is high. In other words, if FBLK is
low, the OSD R/ G/ B output is not selected in the Pre-AMP.
OSD Signal Output (B).
OSD Signal Output (G)
OSD Signal Output (R)
2
VCO_IN
-
-
3
VREF
-
-
4
5
VICTL
VDDA
-
-
-
-
6
HFLB
LOW
Input
7
SDA
-
In/ Out
8
SCL
-
In/ Out
9
VFLB
LOW
Input
10
11
VSS
FBLK
-
-
-
Output
12
13
14
B_OUT
G_OUT
R_OUT
-
-
-
Output
Output
Output
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