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| 型號(hào)： | S71GL064A08BFI0B3 |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA56 |
| 封裝： | 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56 |
| 文件頁(yè)數(shù)： | 74/134頁(yè) |
| 文件大小： | 2383K |
| 代理商： | S71GL064A08BFI0B3 |
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S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
Advance
Info rmation
Programming is allowed in any sequence of address locations and across sector boundaries.
Programming to the same word address multiple times without intervening erases (incremen-
tal bit programming) requires a modified programming method. For such application
requirements, please contact your local Spansion representative. Word programming is sup-
ported for backward compatibility with existing Flash driver software and for occasional
writing of individual words. Use of write buffer programming (see below) is strongly recom-
mended for general programming use when more than a few words are to be programmed.
The effective word programming time using write buffer programming is approximately four
times shorter than the single word programming time.
Any bit in a word cannot be programmed from “0” back to a “1.” Attempting to do so
may cause the device to set DQ5=1, or cause DQ7 and DQ6 status bits to indicate the oper-
ation was successful. However, a succeeding read will show that the data is still “0.” Only
erase operations can convert a “0” to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to program words to the device faster than using
the standard program command sequence. The unlock bypass command sequence is initiated
by first writing two unlock cycles. This is followed by a third write cycle containing the unlock
bypass command, 20h. The device then enters the unlock bypass mode. A two-cycle unlock
bypass mode command sequence is all that is required to program in this mode. The first
cycle in this sequence contains the unlock bypass program command, A0h; the second cycle
contains the program address and data. Additional data is programmed in the same manner.
This mode dispenses with the initial two unlock cycles required in the standard program com-
mand sequence, resulting in faster total programming time. Tables 31 and 32 show the
requirements for the command sequence.
During the unlock bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset
commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle
unlock bypass reset command sequence. The first cycle must contain the data 90h. The sec-
ond cycle must contain the data 00h. The device then returns to the read mode.
Write Buffer Programming
Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one
programming operation. This results in faster effective programming time than the standard
programming algorithms. The Write Buffer Programming command sequence is initiated by
first writing two unlock cycles. This is followed by a third write cycle containing the Write
Buffer Load command written at the Sector Address in which programming will occur. The
fourth cycle writes the sector address and the number of word locations, minus one, to be
programmed. For example, if the system will program 6 unique address locations, then 05h
should be written to the device. This tells the device how many write buffer addresses will be
loaded with data and therefore when to expect the Program Buffer to Flash command. The
number of locations to program cannot exceed the size of the write buffer or the operation
will abort.
The fifth cycle writes the first address location and data to be programmed. The write-buffer-
page is selected by address bits AMAX–A4. All subsequent address/data pairs must fall within
the selected-write-buffer-page. The system then writes the remaining address/data pairs into
the write buffer. Write buffer locations may be loaded in any order.
The write-buffer-page address must be the same for all address/data pairs loaded into the
write buffer. (This means Write Buffer Programming cannot be performed across multiple
write-buffer pages.) This also means that Write Buffer Programming cannot be performed
across multiple sectors. If the system attempts to load programming data outside of the se-
lected write-buffer page, the operation will abort.
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相關(guān)代理商/技術(shù)參數(shù) |
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| S71GL064A08BFI0F0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
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| S71GL064A08BFI0F3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71GL064A08BFW0B0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71GL064A08BFW0B2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
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